Fujitsu F2MC-8FX manual Table B-1 Bus Operation List 9/11, Psl Ccr

APPENDIX
Table B-1	Bus Operation List (9/11)
CODE	MNEMONIC	~	Cycle	Address bus	Data bus	RD	WR	RMW
F8	BNC rel	Divergence
F9	BC rel	4	1	N +2	Data of N +2	1	0	0
FA	BP rel		2	N +3	Data of N +3	1	0	0
FB	BN rel		3	Address divergence	The following	1	0	0
				ahead	instruction
FC	BNZ rel		4	Address divergence	The following	1	0	0
				ahead +1	following instruction
FD	BZ rel	No divergence
FE	BGE rel	2	1	N +2	The following	1	0	0
					instruction
FF	BLT rel		2	N +3	The following	1	0	0
					following instruction
40	PUSHW A	4	1	N +2	The following	1	0	0
					following instruction
41	PUSHW IX		2	−	−	0	0	0
			3	SP -1	Save data (L)	0	1	0
			4	SP -2	Save data (H)	0	1	0
50	POPW A	3	1	N +2	The following	1	0	0
					following instruction
51	POPW IX		2	SP	Return data (H)	1	0	0
			3	SP +1	Return data (L)	1	0	0
20	RET	6	1	N +2	Data of N +2	1	0	0
			2	SP	Return address (H)	1	0	0
			3	SP +1	Return address (L)	1	0	0
			4	−	−	0	0	0
			5	Return address	The following	1	0	0
					instruction
			6	Return address +1	The following	1	0	0
					following instruction
30	RETI	8	1	N +2	Data of N +2	1	0	0
			2	SP	PSH (RP, DP)	1	0	0
			3	SP +1	PSL (CCR)	1	0	0
			4	SP +2	Return address (H)	1	0	0
			5	SP +3	Return address (L)	1	0	0
			6	−	−	0	0	0
			7	Return address	The following	1	0	0
					instruction
			8	Return address +1	The following	1	0	0
					following instruction

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