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| APPENDIX B Bus Operation List | ||||
Table | Bus Operation List (6/11) |
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CODE | MNEMONIC | ~ |
| Cycle | Address bus | Data bus | RD | WR | RMW |
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C7 | MOVW A, @EP | 3 |
| 1 | N +2 | The following | 1 | 0 | 0 |
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| following instruction |
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| 2 | (EP) address | Data(H byte) | 1 | 0 | 0 |
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| 3 | (EP)+1 address | Data(L byte) | 1 | 0 | 0 |
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D7 | MOVW @EP, A | 3 |
| 1 | N +2 | The following | 1 | 0 | 0 |
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| following instruction |
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| 2 | (EP) address | Data(H byte) | 0 | 1 | 0 |
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| 3 | (EP)+1 address | Data(L byte) | 0 | 1 | 0 |
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85 | MOV dir, #d8 | 4 |
| 1 | N +2 | #d8 | 1 | 0 | 0 |
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| 2 | dir address | Data | 0 | 1 | 0 |
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| 3 | N +3 | The following | 1 | 0 | 0 |
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| instruction |
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| 4 | N +4 | The following | 1 | 0 | 0 |
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| following instruction |
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95 | CMP dir, #d8 | 4 |
| 1 | N +2 | #d8 | 1 | 0 | 0 |
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| 2 | dir address | Data | 1 | 0 | 0 |
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| 3 | N +3 | The following | 1 | 0 | 0 |
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| instruction |
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86 | MOV @IX+off, | 4 |
| 1 | N +2 | #d8 | 1 | 0 | 0 |
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| 2 | N +3 | The following | 1 | 0 | 0 |
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| instruction |
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| 3 | (IX)+off address | Data | 0 | 1 | 0 |
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| 4 | N +4 | The following | 1 | 0 | 0 |
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| following instruction |
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96 | CMP @IX+off, #d8 | 4 |
| 1 | N +2 | #d8 | 1 | 0 | 0 |
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| 2 | N +3 | The following | 1 | 0 | 0 |
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| instruction |
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| 3 | (IX)+off address | Data | 1 | 0 | 0 |
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| 4 | N +4 | The following | 1 | 0 | 0 |
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| following instruction |
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245
