Interface
7)If DSTROBE is negated, the device shall assert DSTROBE within tLI after the host has asserted STOP. No data shall be transferred during this assertion. The host shall ignore this transition on DSTROBE. DSTROBE shall remain asserted until the Ultra DMA burst is terminated.
8)If the host has not placed the result of its CRC calculation on DD (15:0) since first driving DD (15:0) during (6), the host shall place the result of its CRC calculation on DD (15:0) (see 5.5.5).
9)The host shall negate DMACK- no sooner than tMLI after the device has asserted DSTROBE and negated DMARQ and the host has asserted
STOP and negated
10)The device shall latch the host's CRC data from DD (15:0) on the negating edge of
11)The device shall compare the CRC data received from the host with the results of its own CRC calculation. If a miscompare error occurs during one or more Ultra DMA bursts for any one command, at the end of the command the device shall report the first error that occurred (see 5.5.5).
12)The device shall release DSTROBE within tIORDYZ after the host negates
13)The host shall not negate STOP no assert HDMARDY- until at least tACK after negating
14)The host shall not assert
b)Host terminating an Ultra DMA data in burst
The following steps shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.4.6 and 5.6.4.2 for specific timing requirements):
1)The host shall not initiate Ultra DMA burst termination until at least one data word of an Ultra DMA burst has been transferred.
2)The host shall initiate Ultra DMA burst termination by negating
3)The device shall stop generating DSTROBE edges within tRFS of the host negating
4)If the host negates HDMARDY- within tSR after the device has generated a DSTROBE edge, then the host shall be prepared to receive zero or one
additional data words. If the host negates HDMARDY- greater than tSR after the device has generated a DSTROBE edge, then the host shall be prepared to receive zero, one or two additional data words. The
additional data words are a result of cable round trip delay and tRFS timing for the device.