![](/images/new-backgrounds/1168396/168396245x1.webp)
Interface
device sets the DRQ bit of Status register, clears the BSY bit, and generates an interrupt. After that, the host system can read up to 512 bytes of data from the buffer.
At command issuance (I/O registers setting contents)
1F7H(CM) | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 |
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1F6H(DH) | × | × | × | DV | xx |
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1F5H(CH) | xx |
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1F4H(CL) | xx |
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1F3H(SN) | xx |
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1F2H(SC) | xx |
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1F1H(FR) | xx |
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At command completion (I/O registers contents to be read)
1F7H(ST) | Status information |
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1F6H(DH) | × | × | × | DV | xx |
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1F5H(CH) | xx |
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1F4H(CL) | xx |
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1F3H(SN) | xx |
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1F2H(SC) | xx |
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1F1H(ER) | Error information |
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(22) WRITE BUFFER (X’E8’)
The host system can overwrite the contents of the sector buffer of the device with a desired data pattern by issuing this command. Upon receipt of this command, the device sets the BSY bit of the Status register. Then the device sets the DRQ bit of Status register and clears the BSY bit when the device is ready to receive the data. After that, 512 bytes of data is transferred from the host and the device writes the data to the sector buffer, then generates an interrupt.