10)If the host has not placed the result of its CRC calculation on DD (15:0) since first driving DD (15:0) during (9), the host shall place the result of its CRC calculation on DD (15:0) (see 5.5.5).
11)The host shall negate DMACK- no sooner than tMLI DSTROBE and negated DMARQ and the host has
after the device has asserted asserted STOP and negated places the result of its CRC
12)The device shall latch the host's CRC data from DD (15:0) on the negating edge of
13)The device shall compare the CRC data received from the host with the results of its own CRC calculation. If a miscompare error occurs during one or more Ultra DMA burst for any one command, at the end of the command, the device shall report the first error that occurred (see 5.5.5).
14)The device shall release DSTROBE within tIORDYZ after the host negates
15)The host shall neither negate STOP nor assert HDMARDY- until at least tACK after the host has negated
16)The host shall not assert
5.5.4Ultra DMA data out commands
5.5.4.1Initiating an Ultra DMA data out burst
The following steps shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.3.7 and 5.6.3.2 for specific timing requirements):
1)The host shall keep DMACK- in the negated state before an Ultra DMA burst is initiated.
2)The device shall assert DMARQ to initiate an Ultra DMA burst.
3)Steps (3), (4), and (5) may occur in any order or at the same time. The host shall assert STOP.
4)The host shall assert HSTROBE.
5)The host shall negate
6)Steps (3), (4), and (5) shall have occurred at least tACK before the host asserts
7)The device may negate DDMARDY- tZIORDY after the host has asserted
8)The host shall negate STOP within tENV after asserting
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