Test | Beep | POST Routine Description |
Point | Code |
|
|
|
|
B2h |
| POST done - prepare to boot operating system |
|
|
|
B4h | 1 | One short beep before boot |
|
|
|
B5h |
| Terminate QuietBoot (optional) |
|
|
|
B6h |
| Check password (optional) |
|
|
|
B7h |
| Initialize ACPI BIOS |
|
|
|
B9h |
| Prepare boot |
|
|
|
BAh |
| Initialize SMBIOS |
|
|
|
BBh |
| Initialize PnP option ROMs |
|
|
|
BCh |
| Clear parity checkers |
|
|
|
BDh |
| Display MultiBoot menu |
|
|
|
BEh |
| Clear screen (optional) |
|
|
|
BFh |
| Check virus and backup reminders |
|
|
|
C0h |
| Try to boot with INT 19 |
|
|
|
C1h |
| Initialize POST Error Manager (PEM) |
|
|
|
C2h |
| Initialize error logging |
|
|
|
C3h |
| Initialize error display function |
|
|
|
C4h |
| Initialize system error handler |
|
|
|
C5h |
| PnPnd dual CMOS (optional) |
|
|
|
C6h |
| Initialize notebook docking (optional) |
|
|
|
C7h |
| Initialize notebook docking late (optional) |
|
|
|
C8h |
| Force check (optional) |
|
|
|
C9h |
| Extended checksum (optional) |
|
|
|
D2h |
| Unknown interrupt |
|
|
|
| The following are for the boot block in the Flash ROM | |
|
|
|
E0h |
| Initialize the chipset |
|
|
|
E1h |
| Initialize the bridge |
|
|
|
E2h |
| Initialize the processor |
|
|
|
E3h |
| Initialize the system timer |
|
|
|
E4h |
| Initialize the system I/O |
|
|
|
E5h |
| Check force recovery boot |
|
|
|
E6h |
| Checksum BIOS ROM |
|
|
|
E7h |
| Go to BIOS |
|
|
|
*If the BIOS detects error 2C or 2E, it displays an additional
92Gateway 7450R Server System Manual