
Test | Beep | POST Routine Description |
Point | Code |
|
|
|
|
12h |
| Restore processor control word during warm boot |
|
|
|
13h |
| Initialize PCI bus mastering devices |
|
|
|
14h |
| Initialize keyboard controller |
|
|
|
16h | BIOS ROM checksum | |
|
|
|
17h |
| Initialize cache before memory |
|
|
|
18h |
| 8254 timer initialization |
|
|
|
1Ah |
| 8237 DMA controller initialization |
|
|
|
1Ch |
| Reset programmable interrupt controller |
|
|
|
20h | Test DRAM refresh | |
|
|
|
22h | Test 8742 keyboard controller | |
|
|
|
24h |
| Set ES segment register to 4 GB |
|
|
|
28h |
| |
|
|
|
29h |
| Initialize POST Memory Manager |
|
|
|
2Ah |
| Clear 512 kb base RAM |
|
|
|
2Ch | RAM failure on address line xxxx* | |
|
|
|
2Eh | RAM failure on data bits xxxx* of low byte of memory bus | |
|
|
|
2Fh |
| Enable cache before system BIOS shadow |
|
|
|
32h |
| Test processor |
|
|
|
33h |
| Initialize Phoenix Dispatch Manager |
|
|
|
36h |
| Warm start shut down |
|
|
|
38h |
| Shadow system BIOS ROM |
|
|
|
3Ah |
| |
|
|
|
3Ch |
| Advanced configuration of chipset registers |
|
|
|
3Dh |
| Load alternate registers with CMOS values |
|
|
|
42h |
| Initialize interrupt vectors |
|
|
|
45h |
| POST device initialization |
|
|
|
46h | Check ROM copyright notice | |
|
|
|
48h |
| Check video configuration against CMOS |
|
|
|
49h |
| Initialize PCI bus and devices |
|
|
|
4Ah |
| Initialize all video adapters in system |
|
|
|
4Bh |
| QuietBoot start (optional) |
|
|
|
4Ch |
| Shadow video BIOS ROM |
|
|
|
*If the BIOS detects error 2C or 2E, it displays an additional
Troubleshooting 89