ZCOM C I/F Library Routines

ZCONFIG (3X)

X.Clk

Value

Clock multiplier

 

0 0

X 1

 

0 1

X 16

 

1 0

X 32

 

1 1

X 64

S.Clk

Value

Clock source

 

0 0

External clock

 

0 1

Internal clock from Baud Rate Generator (BRG)

 

1 0

X.21 clock source

 

1 1

DPPL output (must use BRG as source)

The baud rate is split between two 4-bit parameters (for compatibility reasons). If the Baud 1 parameter is 0, then Baud 2 is used. Rates listed in bold are not available on the Z7340A and Z7350A interface cards. Baud rates above 76800 are not supported on the Z7200A card and rates above 128000 are not supported for the Z7400A card.

Baud 1

Value

Rate

Value

Rate

 

0000

Use Baud2

1000

19,200

 

0001

300

1001

38,400

 

0010

600

1010

48,000

 

0011

1,200

1011

57,600

 

0100

2,400

1100

76,800

 

0101

4,800

1101

64,000

 

0110

9,600

1110

128,000

 

0111

14,400

1111

256,000

Baud 2

Value

Rate

Value

Rate

 

0000

150

1000

768,000

 

0001

56,000

1001

1,024,000

 

0010

153,600

1010

1,228,800

 

0011

307,200

1011

1,536,000

 

0100

192,000

1100

1,544,000

 

0101

614,400

1101

2,048,000

 

0110

384,000

1110

Reserved

 

0111

512,000

1111

Reserved

192

Chapter 4

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Image 192
HP UX 11i v1 I/O Cards manual Value Clock multiplier, Value Rate 0000 Use Baud2 1000 19,200