11-5
ASYNCHRONOUS SERIAL I/O UNIT
The baud-rate generator’s output frequency is determined by BCLKIN and a divisor as follows.
,
The minimum divisor value is 1, giving a maximum baud rate of BCLKIN. T he maximum divisor
value is 0FFFFH (65535), giving a minimum of BCLKIN/65535. For example, the maximum and
minimum bit-rate frequencies using SERCLK with a 25 MHz device (CLK2 = 50 M Hz) or
COMCLK with a 12.5 MHz input are shown in Table 11-2. Table 11-3 shows the divisor values
required for common baud rates.
Table 11-2. Maximum and Minimum Output Bit Rates
Input Clock (BCLKIN) Divisor Output Bit Rate
12.5 MHz 0001H 781.25 KHz (max)
12.5 MHz 0FF FF H 11.921 Hz (min)
Table 11-3. Divisor Values for Common Bit Rates
Divisor Input Clock (BCLKIN) Outp ut Bit Rate % Error
1AEH 16.5 MHz (processor clock = 33 MHz) 2400 b/s – 0.07
6BH 16.5 MHz (processor clock = 33 MHz) 9600 b/s + 0.39
48H 16.5 MHz (processor clock = 33MH z) 14.4 Kb/s – 0.54
145H 12. 5 MHz (processor clock = 25 MHz) 2400 b/s + 0.15
51H 12.5 MHz (processor clock = 25 MHz) 9600 b/s + 0.47
36H 12.5 MHz (processor clock = 25 MHz) 14.4 Kb/s + 0.46
104H 10 MHz (processor clock = 20 MHz) 2400 b/s + 0.15
41H 10 MHz (processor clock = 20 MHz) 9600 b/s + 0.16
2BH 10 MHz (processor clock = 20 MHz) 14.4 Kb/s + 0.94
0D0H 8 MHz (processor clock = 1 6 MHz) 2400 b/s + 0.16
34H 8 MHz (processor clock = 16 MHz) 9600 b/ s + 0.16
23H 8 MHz (processor clock = 16 MHz) 14.4 Kb/s – 0.79
baud-rate gene rator output f requency B C LKI N frequency
divisor
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bit rate baud rate generato r outp ut frequ en c y
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