Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
12-44
12.3.11 Channel Mask and Group Mask Registers (DMAMSK and DMAGRPMSK)
Use the DMAMSK and DMAGRPMSK registers to disable (ma sk) or enabl e channel hardware
requests. DMAMSK allows you to disable or enable hardware requests for only one channel at a
time, while DMAGRPMSK allows you to disable or enable hardware requests for both channels
at once.
NOTE
Each mask bit is set when its associated channel produces an End-of-Process if
the channel is not programmed for Autoinitialize. Software must then clear the
appropriate mask bit to allow further DREQn requests from initiating
transfers.
Figure 12-29. DMA Channel Mask Register (DMAMSK)
DMA Individual Channel Ma sk
DMAMSK
(write only)
Expanded Addr:
ISA Addr:
Reset State:
F00AH
000AH
04H
7 0
———— —HRM0CS
Bit
Number Bit
Mnemonic Function
7–3 — Reserved; for compatibility with future devices, write zeros to these bits.
2 HRM Hardware Request Mask:
0 = Unmasks (enables) hardware requests for the channel specified by
bit 0.
1 = Masks (disables) hardware requ ests for the channel specified by
bit 0.
NOTE: When this bit is set, the cha nnel can still receive software
requests.
1 0 Must be 0 for correct operation.
0 CS Channel Select:
0 = The selection for bit 2 affects ch annel 0.
1 = The selection for bit 2 affects ch annel 1.