Intel 386 D.8 DMABSR

D-13
SYSTEM REGISTER QUICK REFERENCE
D.8 DMABSR
DMA Bus Size
DMABSR
(write only)
Expanded Addr:
ISA Addr:
Reset State:
F018H
—
X1X10000B
7 0
—RBS—TBS ——0 CS
Bit
Number Bit Mnemonic Function
7 — Reserved; for compatibility with future devices, write zero to this bit.
6 RBS Requester Bus Size:
Specifies the reque ster’s data bus width for the channel spe cified by bit
0.
0 = 16-bit bus
1 = 8-bit bu s
5 — Reserved; for compatibility with future devices, write zero to this bit.
4 TBS Target Bus Size:
Specifies the target’s data bus width for the channel specified by bit 0.
0 = 16-bit bus
1 = 8-bit bu s
3–1 0Must be 0 for correct operation.
0 CS Channel Select:
0 = The selections fo r bits 7–4 affect channel 0.
1 = The selections fo r bits 7–4 affect channel 1.