Intel 386 Figure 12-22. DMA Command 1 Register (DMACMD1)

12-35
DMA CONTROLLER
12.3.5 Command 1 Register (DMACMD1)
Use DMACMD1 to enable both channels and to select the rotating method for changing the bus
control priority structure.
Figure 12-22. DMA Command 1 Register (DMACMD1)
DMA Command 1
DMACMD1
(write only)
Expanded Addr:
ISA Addr:
Reset State:
F008H
0008H
00H
7 0
—— —PRE —CE——
Bit
Number Bit Mnemonic Function
7–5 — Reserved; for compatibility with future devices, write zeros to these bits.
4 PRE Priority Rotation Enable:
0 = Priority is fixed based on value in DMACM D2.
1 = Enables the rotation method for changing t he bus control priority
structure. That is, after the external bus master or one of the DMA
channels is given bus control, it is as signed to the lowest priority
level.
3 — Reserved; for compatibility with future devices, write zero to this bit.
2 CE Channel Enable:
0 = Enables channel 0 and 1.
1 = Disables the channels.
1–0 — Reserved; for compatibility with future devices, write zeros to these bits.