Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
15-6
15.4 REGISTER DEFINITIONSTable 15-2 provides an overview of the registers associated with the RCU. The following sectionsprovide specific programming information for each register.Table 15-2. RCU Registers
Register Expanded
Address Description
RFSCIR
(read/write) 0F4A2H Refresh Clock Interval:
Determines the processor clock (CLK2/2) count between refresh requests.
RFSCON
(read/write) 0F4A4H Refresh Control:
Enables the refresh control unit. Readin g this register also provides the
current value of the interval counte r.
RFSBAD
(read/write) 0F4A0H Refresh Base Address:
Contains the A25:14 address bits of the refresh address. This establishes
a memory region for refreshing.
RFSADD
(read/write) 0F4A6H Refresh Address:
Contains the A13:1 address bits of the refresh address. The 13-bit address
counter generates these values.