Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
13-22
Figure 13-20. SSIO Control 1 Register (SSIOCON1)SSIO Control 1
SSIOCON1
(read/write)
Expanded Addr:
ISA Addr:
Reset State:
F486H
—
C0H
7 0
TUE THBE TIE TEN ROE RHBF RIE REN
Bit
Number Bit
Mnemonic Function
7 TUE Transmit Underrun Error:
The transmitter sets this bit to indicate a transmit underru n error in the
TEN transfer mode. Clear this bi t to clear the error flag. If a one is wri tten
to TUE, it is ignored and TUE retains i ts previous value.
6 THBE
(read only bit) Transmit Holding Buffer Empty:
The transmitter sets this bit when th e transmit buffer contents have been
transferred to the transmit shift register, indicating that the buffe r is now
ready to accept new data. Writ ing data to the transmit buffer clears
THBE. When this bit is clear, the buffer is not ready to accept any new
data.
5 TIE Transmitter Interrupt Enable:
0 = Clearing this bit preven ts the Inte rru pt Con tro l Unit fro m sensin g
when the transmit buffer is e mpty.
1 = Setting th is bit connects the transmit buffe r empty internal signal to
the Interrupt Control Un it.
4 TEN Transmitter Enabl e:
0 = Disables the tran smitter.
1 = Enables the transmitter.
3 ROE Receive Overflow Error:
The receiver sets this bit to indicate a receiver overflow error. Write zero
to this bit to clear the flag.
If a one is written to ROE, the one is ignored and ROE retains its
previous value.
2RHBF
(read only bit) Receive Holding Bu ffer Full:
The receiver sets this bit when the receive shift register contents have
been transferred to the recei ve buffer.
Reading the buffer clears this bit.
1 RIE Receive Interrupt Enable:
0 = Clearing this bit preven ts the Inte rru pt Con tro l Unit fro m sensin g
when the receive buffer is full.
1 = Setting this bit connects the receiver buffe r full interna l sig nal to the
Interrupt Control Unit.
0 REN Receiver Enable:
0 = Clearing this bit di sables the receiver.
1 = Setting this bit e nables the receiver.