Intel SDS2 manual 1 CNB20HE-SL Champion North Bridge, PCI Bus P32-A I/O Subsystem

Intel® Server Board SDS2 Processor and Chipset

3.3.1CNB20HE-SL Champion North Bridge

The Champion North Bridge Rev 2.0 High End Super Lite (CNB20HE-SL) is the third generation product in the Server Works Champion North Bridge Technology. The HE-SL is a 644-pin ball- grid array (BGA) device and uses the proven components of previous generations like the Pentium Pro Bus interface unit, the PCI interface unit, and the SDRAM memory interface unit. In addition, the HE-SL incorporates a proprietary Intra Module Bus (IMBus) Interface. The IMBus interface enables the HE-SL to directly interface with the CIOB20 through its two unidirectional 16-bit wide data busses with parity support. The HE-SL also increases the main memory interface bandwidth and maximum memory configuration with a 144-bit wide memory interface.

The HE-SL integrates three main functions:

∙An integrated high-performance main memory subsystem

∙An IMBus interface that provides a high-performance data flow path between the Pentium Pro bus and the I/O subsystem

∙A PCI interface which provides an interface to the compatibility PCI bus segment and the CSB5 (South Bridge).

Other features provided by the HE-SL include the following:

∙Full support of ECC on the processor bus

∙Full support of ECC on the memory interface

∙Eight deep in-order queue

∙Full support of registered PC-133 ECC SDRAM DIMMs

∙Support for 6 GB of 2-way interleaved SDRAM

∙Memory scrubbing

3.3.1.1PCI Bus P32-A I/O Subsystem

The HE-SL provides a legacy 32-bit PCI subsystem and acts as the central resource on this PCI interface.

P32-A supports the following embedded devices and connectors:

∙CSB5: South Bridge

∙Two Intel® 82550PM 10/100 Fast Ethernet PCI network interface controllers

∙An ATI RAGE XL Video Controller with 3D/2D graphics accelerator

∙Two 32-bit, 33-MHz 5V full length PCI Slots

Revision 1.2	9
Order Number:	A85874-002