Firmware BMC | Intel SDS2 specs

Intel® Server Board SDS2

BIOS

6.2.3.3Memory Bus Error

The BMC monitors and logs memory errors. The BIOS will configure the hardware to notify the BMC on correctable and uncorrectable memory errors. Uncorrectable errors generate an SMI to stop the system and prevent propagation of the error. The BMC will query the hardware for error information when notified.

6.2.3.4System Limit Error

The BMC monitors system operational limits. It manages the A/D converter, defining voltage and temperature limits as well as fan sensors and chassis intrusion. Any sensor values outside of specified limits are handled by the BMC and there is no need to generate an SMI to the host processor.

6.2.3.5Processor Failure

The BIOS detects processor BIST failure and logs this event. The first OEM data byte field in the log can identify the failed processor. For example, if processor 0 fails, the first OEM data byte is 0. The BIOS depends upon BMC to log the watchdog timer reset event.

6.2.3.6Boot Event

The BIOS downloads the system date and time to the BMC during POST and logs a boot event. This does not indicate an error, and software that parses the event log should treat it as such.

6.2.3.7Chipset Failure

The BIOS detects the chipset (CNB2.0HE-SL and CIOB20) failure and logs this event. The chipset error generates an SMI.

6.2.4Firmware (BMC)

The BMC implements the logical System Event Log (SEL) device as specified in the Intelligent Platform Management Interface Specification, Version 1.5. The SEL is accessible via all BMC transports. This allows the System Event Log information to be accessed while the system is down via out-of-band interfaces.

6.2.4.1Sensor Number and Types Codes

The BIOS generates a POST error message when the System Event Log is full. This warning will not inhibit the system from booting if halt on Post Error code is disabled in the BIOS Setup in the Advanced menu.

Sensor Name, Sensor number and Sensor type for the SDS2 platform are listed in the following Table 24 Platform SEL Log Sensors for SDS2.

Table 24 Platform SEL Log Sensors for SDS2

Revision 1.2	39
Order Number:	A85874-002

Image 53

Intel SDS2 manual Firmware BMC

Contents

Intel Server Board SDS2 Revision Revision History Intel Server Board SDS2Order Number A85874-002 Date Revision Modifications Number Intel Server Board SDS2 Disclaimers Iii Table of Contents Revision Order Number A85874-002 Intel Server Board SDS2 Table of Contents Table of Contents Intel Server Board SDS2 102 101106 Revision Vii Order Number A85874-002 Viii Revision Order Number A85874-002 124 Glossary Reference DocumentsIndex List of Figures Intel Server Board SDS2 SDS2 Server Board Block Diagram Intel Server Board SDS2 List of Tables List of Tables Xii Revision Order Number A85874-002 List of Tables Intel Server Board SDS2 Revision Xiii Order Number A85874-002 Xiv Revision Order Number A85874-002 This page intentionally left blank Intel Server Board SDS2 Introduction Introduction Architecture Intel Server Board SDS2 Architecture Revision Order Number A85874-002 Processors Processor and ChipsetProcessor and Chipset Intel Server Board SDS2 SDS2 Intel Pentium III Processor Support Matrix SL5XL Intel Server Board SDS2 Processor and Chipset Processor Voltage Regulator Module VRM Memory ConfigurationMemory Subsystem Memory Dimm Dimm PairRow DIMM1A, DIMM1B DIMM2A, DIMM2B DIMM3A, DIMM3B 2 I2C Bus ChipsetI2C Addresses for Dimm Slots Device Address PCI Bus P32-A I/O Subsystem 1 CNB20HE-SL Champion North Bridge 3 CSB5 South Bridge CIOB20 Champion I/O BridgePCI Bus P64-B I/O Subsystem PCI Bus P64-C I/O Subsystem PCI Subsystem O Subsystem1 32-bit, 33-MHz PCI Subsystem Device IDs Idsel 2 64-bit, 66-MHz PCI Subsystem Subsystem Intel Server Board SDS2 P32-A Configuration IDs1.2 P32-A Arbitration P32-A Arbitration Connections P64-C Configuration IDs Intel Server Board SDS2 Subsystem P64-B Configuration IDs2.2 P64-B Arbitration 2.3 P64-C Arbitration Video Controller Ultra160 ScsiVideo Modes Zero Channel RAID ZCR Capable PCI Slot Intel Server Board SDS2 Subsystem Video Modes Network Interface Controller NIC CSB5 South Bridge PCI-to-LPC Bridge, IDE, USB NIC Connector and Status LEDsPCI Bus Interface PCI Bus Master IDE Interface General Purpose Input and Output Pins Power ManagementUSB Interface Compatibility Interrupt Control Chipset Support Components Pin # Signal Name DescriptionSuper I/O General Purpose Input and Output Gpio Floppy Serial PortsKeyboard and Mouse Parallel Port Interrupt Routing Bios FlashLegacy Interrupt Routing Legacy Interrupt Routing IRQ Scan for Pciirq Apic Interrupt RoutingSerialized IRQ Support SCAN2 INT IoapicSCAN0 Ioapic PCIIRQ0 Super I/O Serialized IRQ Interface PCI IRQ SerializerCSB5 Interrupt Routing Slot Intel Server Board SDS2 Server Management Server Management Baseboard Server Management Intel Server Board SDS2 ADM1026 Input Definition Pin Signal Name DescriptionSahalee Baseboard Management Controller Sahalee Input Definition Temperature SensorsTemperature Sensor Description Resolution Accuracy NFAN6SENSEP Fault Resilient BootingNmemalertl Nbmcsecuremode Power-up Reset System Reset ControlHard Reset Soft Reset Private I2C Bus 1 Devices Intel Server Board SDS2 Server Management Ipmb Bus DevicesPrivate I2C Bus 2 Devices Private I2C Bus 3 Devices Error Sources and Types Error ReportingPCI Bus Errors Intel Pentium III Processor Bus Errors Memory Bus Errors AC Link ModeAcpi ID LED Setup Utility F2 can change the AC link mode settings System Bios Bios Logging Format Conventions Bios Error HandlingHandling and Logging System Errors Sensor Sensor Type Number Specific Event Code Offset Bios Generated SEL ErrorsPCI Serr PCI Perr Intel Pentium III Processor Bus Error PCI Bus ErrorEvent Request Message Event Data Field Contents SMI Handler Firmware BMC Sensor Type Triggers Event Reading Offset Name Lvds Scsi BB Vbat OEM C7h 01h Temp Tach Fan 48h Fan 04h Threshold 49h FRB2 FRB3 Ierr FRB1 Timestamp Clock ASF Progress Codes Error Messages and Error CodesPost Codes Port-80h Code Definition Standard Bios Post Codes Bios Bios Beeps Reason Recovery Bios Post Codes Post Error Messages and Codes Post Error Codes and MessagesCode Error Message Failure Description Cmos Reason for Beep Baseboard Management Controller BMC Beep Code GenerationBMC Beep Codes Configuration Utilities Overview Setup UtilitySetup Utility Operation Setup Utility Screen Keyboard Command Bar Entering Setup Utility ESC Key Option Description Main Menu Selections Menu Selection Bar Cdrom Primary Master and Slave IDE Submenu SelectionsAuto Standard Processor Settings Submenu SelectionsNot Installed Advanced Menu Selections Memory Configuration Menu Selections On-board Scsi and LAN Submenu Selections PCI Configuration Menu SelectionsOn-board VGA Submenu Selections PCI slot Submenu Selections Bios 3F8h O Device/Peripheral Configuration Submenu Selections2F8h EPP Security Menu Selections Advanced Chipset Controller Submenu SelectionsPCI Device Submenu Selections Hours Server Menu SelectionsNormal System Management Submenu Selections Disable ImmediatelyBMC IRQ IRQ5 IRQ10 Boot Priority Device Description Boot Device Priority SelectionsConsole Redirection Submenu Selections 9600 Removable Drive Selections Hard Drive SelectionsExit Menu Selections Option Description Loading the System Bios Flash Update UtilityCmos Memory Definition Clearing Cmos Performing Bios Recovery Recovery ModeUser Binary Area Language Area Bios Clock Clock/Voltage Generation and Distribution CPU HE-SL Voltage Supply Connections Power Distribution Board Connector Dimm Connector Pin-out Memory Module ConnectorIntel Server Board SDS2 Connections Pin Front Back OEM Ipmb Connector Icmb ConnectorScsi Hsbp Ipmb Connector System Management Headers Front Panel 34-Pin Header Pin-out Front Panel HeaderKEY I2C SDA Bit 5 V PCI Slot Pin-out PCI Slot Connector64-bit 3.3V PCI Slot Pin-out Pin Side B Side a PRSNT2# RSV TDO TDI INTA# INTB# INTC# INTD# PRSNT1# RSVM66EN PAR64 VGA Connector I/O ConnectorsScsi Connector VGA Connector Pin-out Signal Name Connector Contact Number NIC ConnectorsRJ-45 Connector Pin-out Universal Serial Bus USB Connectors IDE ConnectorIDE 40-pin Connector Pin-out Txdp Rxdp Txdm Rxdm Pin USB Connection Header 2 x 5 Pin-out Floppy Connector DB9 Serial Port Pin-out Serial Port Connector DB25 Parallel Port Pin-out Keyboard and Mouse ConnectorParallel Port Miscellaneous Headers External Scsi Activity LED Input Signal ConnectorFan Headers Chassis Intrusion Server Board Connector Manufacturer Part Numbers Connector Manufacturers and Part NumbersRear I/O Panel CN Numbers Qty Manufacturer Mfg Functional Description Jumpers Intel Server Board SDS2 System Configuration JumpersJumpers Intel Server Board SDS2 Jumpers SDS2 Configuration Jumpers RSV Bios System Configuration Jumper OptionsCN59 CPU Frequency Select Jumper Settings CPU Frequency Select Jumper Options Performing Bios Recovery Boot Performing Cmos Clear, Bios Recovery, and BMC Force UpdateJumper Pins Default Operation Performing Cmos Clear Performing BMC Force Update Power Consumption Electrical and Thermal SpecificationsAbsolute Maximum Ratings Absolute Maximum Ratings Power Timing Power Supply SpecificationSDS2 Power Supply Specification Voltage Timing ParametersPage 100 Revision Order Number A85874-002 Estimateded Server Board MtbfEstimated SDS2 Server Board Mtbf Turn On/Off Timing Intel Server Board SDS2 Mechanical Specifications Mechanical Specifications Regulatory and Integration Information Safety RegulationsRegulatory Compliance EMC Regulations Revision 103 Order Number A85874-002 Installation InstructionsEnsure EMC Place Battery Marking on Computer Ensure Host Computer and Accessory Module CertificationsPrevent Power Supply Overload Icmb External Cable Connectors Installation PrecautionsUse Only for Intended Applications External Icmb Cable Information Summary Errata Table Errata ListingErrata Listing Intel Server Board SDS2 Errata Summary Revision 107 Order Number A85874-002 Intel Server Board SDS2 Errata Listing 108 Revision Order Number A85874-002 Revision 109 Order Number A85874-002 110 Revision Order Number A85874-002 Intel Server Board SDS2 CD-ROM issues Revision 111 Order Number A85874-002 112 Revision Order Number A85874-002 High resolution video modes do not work correctlyMode Support Comments Revision 113 Order Number A85874-002 Lower performance with CAS Latency 2 memory 114 Revision Order Number A85874-002 Novell NetWare* v .0 does not install on SDS2 Revision 115 Order Number A85874-002 SDS2 0B71 System Temperature out of the range Post message 116 Revision Order Number A85874-002 SDS2 0B75 System Voltage out of the range Post message Revision 117 Order Number A85874-002 Recommendation for SDS2 rubber bumper installation 118 Revision Order Number A85874-002 Revision 119 Order Number A85874-002 Placing the Rubber Bumper in the Chassis 120 Revision Order Number A85874-002 Boot to service partition via modem failsSecondary IDE References Added To Documentation for FAB Revision 121 Order Number A85874-002 Bootable CD will not boot if inserted during Option ROM scan 122 Revision Order Number A85874-002 Revision 123 Order Number A85874-002 Can Not Change Bios Setup IDE Options Using Enter KeyStatus Will Not Fix 124 Revision Order Number A85874-002 Revision 125 Order Number A85874-002 SDS2 PCI slot current levels supported by the 5V rail 126 Revision Order Number A85874-002 Term Definition Glossary Intel Server Board SDS2 Reference Documents Index Intel Server Board SDS2 Index Get SDR Time command, 43 Get SEL Time command, 43 GPI pin RevisionIII Order Number A85874-002 NPWRGD+00 Index Intel Server Board SDS2 RevisionV Order Number A85874-002