Becauseof the translation, the flow of packetsand frames between PE1 (the M Series
router)and PE2 (the MX series router) routers is not symmetrical,as is shown in Figure
11on page 78.
Figure11: ATM Ethernet VLAN Interworking PacketStructure
g017429
MPLSInnerVLANL3 Ethertype SA DA Ethernet
MPLSInnerVLANL3 Ethertype SA DA Ethernet
1.PE1 PE2
2.PE2 PE1
8bytesis an ATM cookie added by an M Series ATMpic.
Thefirst 2 bytes of this ATM cookie is inner VLAN.
ForPE1 to PE2 traffic, the 8 bytes followingthe MPLS header is an ATM cookie added by
theM Series ATM PIC. The first twobytes are the inner VLAN tag, which is why the field
extendsto the right of the figure.
Thetraffic between PE2 and CE2 is a normal flow of stackedEthernet frames.
Youcan also configurea CCC with remote interface switch or Layer2 circuit over
AggregatedEthernet on the MX Series router(PE2). When CCC is configured for
AggregatedEthernet, the flow of packetsis as shown in Figure 12 on page 78.
Figure12: CCC to Stacked VLAN Translation
g017430
L3 Ethertype SA DA MPLSInner VLAN Ethernet
MPLSInnerVLANL3 Ethertype SA DA Ethernet
1.CCC to stacked-vlan
2.Stacked-vlan to CCC
L3 Ethertype SA DAIvlan Ovlan
L3 Ethertype SA DAIvlan Ovlan
Related
Documentation
MXSeries Ethernet Services Routers SolutionsPage
ConfiguringMX Series Router ATMEthernet Interworking on page 79
Copyright© 2010, Juniper Networks,Inc.78
Junos10.4 MX Series Ethernet ServicesRouters Solutions Guide