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Sharp MZ-3500 service manual Specification of keyboard control, At rrn, Key

Models: MZ-3500

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MZ3500

10. MZ1K01 KEYBOARD CONTROLLER CIRCUIT DESCRIPTION

10-1. Specification of keyboard control

1)Input Buffer Capacity: 64 bytes

•Key-in data is written to the input buffer first, and is supplied to the CPU, byte by byte.

•When an overflow is detected, the overflow code is affired to the key-in data already sent, before being sent to the CPU.

2)Rollover

•2 key rollover (exemption in the CTRL mode)

(Entry of the second key depression can be accepted even if more than one key is pressed at same time.)

•Simultaneous depression of more than three keys is ingnored.

3)Key bounce

15msec (Key spec is5-10msec)

(Indicates unstable state as shown in Fig. 3-2 that key signal does not turn off immediately after releasing of finger from the key.)

4)Key

5msec (norma), 20msec (max), 15msec (allows for key bounce)

5)DEF Key

Twenty definable keys are available in combination with the CTRL key.

[ DFK1-DFK10(DEF1A-DEF10A) DEF1-DFK10 in conjunction with the CTRL key

-- - (DEFIB-DEF10B)- (DEF1B-DBF10B)

6)Handling of functional symbols and graphic symbols See the code table.

7)Use of the CTRL key to discriminate RUN and CONT of the DEB key.

Push the DEB in conjunction with the CTRL key to start running.

8)Handling of special codes

COPY command: CTRL 1 J (ten key)

ESCape CTRL

BRKCTRL

9)PRO/OP

Sent to the CPU after power on and when PRO/OP is changed.

10)HOME key

CTRL [ HOME] Returns home after clearing the display screen.

[HOME] Only the cursor returns home.

11) One-step commands

	uior
LMU /	rnlNI
LML) o	INrU T
UMU 4	USING
pft/in "7 .	(jU I U
pft/in "7 .	pr\ci ID
	Kb 1 UnN
	Lib 1
PMH n .
PMn A	At rrn
	ULUbt
PMH n -	n ATA
	nrUnMA 1 fF
CMU K.	K.hY IN
PMH i	i OAH
r*Mn r\ -
	nhAU
PMH c	CA\/C

12) Mode indication on LED

Acrn

i nr^w

13)REP

Key repetition will take place when a key depressed for more than 0.64second. Entry of other keys is permitted during key repetition. When two keys are depresssd at the same time, an alternate key entry will not be accepted. This rule does not apply to simultaneous depression of more than three keys.

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Image 83

Sharp MZ-3500 service manual Specification of keyboard control, At rrn, Key

Contents

Personal Computer Model Z-350 Video TimerBACKUP, INIT, COPY, DEBUG, Killall MemorySFDI/F Refer to the page TIN Circuit DiagramSlot Slot2 LSI, 1C CmosicChange Disp PresetSymbol SdispUser Basic Area RAMBase SystemMZ-1D07 MZ3500 System configuration of Model MS1 = D MSO = 0 L Software Memory ConfigurationTiming of Reset Signal ROM-IPL SD1 System Loading & CP/MMAO Bank SelectFfff ROM SD3 RAM based BasicOperational description BankMain Memory Mapper Block diagram Relation between MMR main memoryTable below describes address map Main CPU and I/O portThis paragraph discusses main CPU I/O Sub CPU and I/O port 0001Main CPU \m MZ3500Coab Memory mapper MMRSP6102R-001 Block diagramTo Reset Address BUSSrdy MZ3500 Memory mapper MMR SP6102R-001 signal descriptionRAS ROW Address Select Line Address Select Signal Pin No RO2B IN/OUTRO1B 1 1 1 1 1 1 FF 14 I N D3 A7 A6 A5A4A3A2AlAO H E X Uhus 1 O1 1 1 1 0 KI1 Dl Do 17 D6 D5 D2 Dl 1 1 1 1 1 0 FE do D4 D3MZ3500 Memory ROMIPL, RAMCOM, S-RAM select circuit CRT SpecificationAsci Summary of video display specificationGraphic dot Dot pitchBlue Dot color designated byCH AI +,! AT A r + + G CH ATKA7 Ascii CG #1 FFFVideo RAM Structure of Vram #0000 Structure of character Vram When read/write from GDC#07FFA 8bit Read/write by Z-80 via the GDC 640 x 200 dots display modeFV = 60 Hz 16KO signal switching 640 x 400 bits display mode FH = 20.92 kHz FV = 47.3 HzSetup of GCD master/slave Master/slave setup by combinationGraphic V-RAM Address Crtc block diagramPage Master slice LSI CSP-1 SP6102C 002 signal description CSH CSP-1 Block Diagram» CK HSY2 2BLK2 LSI CSP-2 SP6012C-003 Signal DescriptionCAS OUT CSP 2 Block Diagram3r00 DSP2 OUTGDC Graphic display controller UPD7220 signal description CSR-1MAGE AD15ILC2NK-CLC AT~BTIStructure CG Address Select CircuitCircuit description VsyncBlsc Character Vram select circuitRead/write from the Z-80 to V-RAM Set GDC command codeFifo Empty? Return when all parameters were sentCsrw C 49H -COMMAND Code Write C 23H Command Code Vecte C 6CH Command CodeFollowing manner Dot display program example-1 60HExplanation VECTE. Dot address is structured on the screenKind of line solid line I T E C 23HP4 88H P5 HH Outline Floppy diskTJ ILJ n Ci D ci Ici VnVn n nV nnn7Data MZ3500 MFD interface block diagram 22 «- o Window FDC UPD765UPD765 signal description MFM recording method Trigger motor on of the timer 555 Selects FDDMZ350C Port used in the MFD interface is as followsControl during seek and recalibration Controls during read, write, seek, and re- calibrateMedia detection 3500 Precompensate CircuitPurpose String of data Pulses from the FDD Data window VFO circuitFilter Phase Detector Amplifier Window VFO circuit configurationBQA MFM ModeFM mode timing chart \\\\ 3DSC Side =Aload Indicates the byte position From the top of directory 76 iy 7 EH 77 / FFH\128 Track 10 sector1015 Ii PatatB144 6145 B146 B147 39 B148 B149 B150 B151 39 B74 B75Example 7-bits, even parity, 1 stop bit General specificationData transmission format MZS500OFF AC controlsStart 8251 AC MZ3500 Data output controlKTS RXEN,UTR , T X E N 3SOO128 2009 6.3 256«--N Wl -»8253 OUT 8253DS7 Printer interfacing circuitAA3 DATData transfer timing General description of the parallel interfaceOutput I/O port map DIN Clock circuit SchematicRead Hold Write Hold SETLSB MSB MZ3500 PD1990AC Block diagram» GETE1 J MmmilSFD 1/F 3500S I C GP I/OFD2 SW2 SW1 On on CE332P OFF on MZ1P02 On OFF IO2824 OFF OFFDipswa SEC\f Canbe in either state Description of each block Block diagramFunctions +5V Switching regulatorTiming chart Alarm generation circuitKey Specification of keyboard controlAt rrn Strobe Key search timing2s 2s22 21 KeyProtocol Key to sub CPU 132.522.5/-s Keyboard controller basic flow ALE DBO DB7 GND Keyboard controller signal descriptionXTAL1 XTAL2 Reset INT PINOn OFF Sub-CPU side ProcedureS C I I 00-FF Shared RAMCRT inter face test AbnormalReady O.H Abnormal test ending1 5 c * O DR O.7 ROM-IPL Main CPU Checker Flow Chart 1/2 100 Main CPU Checker Flow Chart M?M7*500 101Keyboard test Keyboard controller ROM testIPL Flow Chart Load Iocs SEEK& Read Jump \ Boot Address SystemSEEK, Read Error Error105 SUB CPU IPL Flow ChartR R R R F1 LJ LJ LJ LJ LJ LJ LJU J l J J L i J L L j l J J L l J L L l LU LU U LJ LlJ LJ U URoB IwCAIO MZ-35OO Parts Guide LI S C R I P T I O N No Parts CodeLED PWB IE--or Ooss-zw Qcnw MZ-3500Parts Code N T KS C R I P T I O N ConnectorA a N a D MZ-3500NO. Parts Code Parts CodeNEW VH S N 7 4 0 6 NCoos Part S C R I P T I O NMark Rank M2-3500 J9, MZ1K02,1K03,1K04,1K05 Key unitNO. Parts Code SOCLSI RAM LA aD e Tin N a a Parts CodeMZ-3500 Sharp Corporation