Sony S530D manual Standby Oscillator, Start, Run, Regulation Concept, Regulation Circuitry

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Standby Oscillator

The standby oscillator produces Ever +5 volts when the DVD player is plugged into 120VAC. This Ever 5V is applied to the Interface IC201 (on the circuit board behind the front panel) and the audio and video mute transistors (on the rear board). The standby oscillator stage consists of two transistors and a transformer. Regulation is performed using the Ever 5V output to control the off time of the oscillator cycle.

The standby oscillator has three operational parts:

·Start

·Run

·Regulation

Start

At AC plug in, the standby oscillator stage begins when R122 and R123 bring the FET Q121 gate voltage from 0 to about 1volt. This turns on the low power FET, allowing it to pass Drain to Source current and complete T102’s primary circuit path to hot ground.

Run

Oscillator transistor Q121 turns ON

As current flows in T102’s upper left primary winding, a voltage is induced in the lower secondary winding that will keep FET oscillator Q121 turned ON. A positive voltage from the lower secondary winding takes two paths. The first path is through R126, R125 and C121 to Q121’s gate. This keeps Q121 conducting. The second path is through R127 and R128 to Q122’s base. Q122’s collector is connected to the oscillator’s gate. As a result, Q122 becomes an active resistor. Q122’s conduction prevents the gate voltage from rising too high (protection) and later we will see that it is used for regulation.

Oscillator transistor Q101 turns OFF

When Q101 is saturated, there is no longer a change in T102’s primary current. The voltage induced into the lower secondary winding decays. This reduction in bias voltage permits Q121 to turn OFF. With Q121 OFF, the magnetic field in T102’s primary winding collapses, causing current flow thorough C123 and limiter R130.

The collapsing magnetic field induces a negative voltage into the lower secondary winding. The negative voltage takes two paths to reset the oscillator. The first path is through R126, R125 and C121 to keep oscilla- tor transistor Q121 OFF. The second path is through D121 and R128 into the base of Q122. This turns off transistor Q122 in preparation for the next oscillator cycle.

Regulation Concept

Regulation of the Ever 5V line is accomplished by sampling the output voltage and using it to reduce the off time of the oscillator. By reducing the off time, the total oscillator cycle is reduced. Shortening the time it takes to complete a cycle means its frequency is increased.

This oscillator signal is applied to transformer T102. A transformer has an optimum frequency that will allow maximum power transfer (at reso- nance). When the applied oscillator frequency is above resonance, the efficiency drops and its secondary voltage is reduced. By varying the applied frequency, the output voltage can be regulated.

Regulation Circuitry

IC202 is the error regulator for this stage. Voltage divider R212, R209 and R210 reduce the Ever 5V so there is 2.5V at IC202’s input. This allows its operation in the linear region. IC202’s output (collector) is in- versely proportional to its input. The collector output is connected to the opto-isolator diode that passes the error signal to the hot ground oscillator circuit.

If the Ever 5V increased, the opto-isolator transistor would conduct more, reducing the resistance between the lower secondary winding and Q122’s base. The reduced resistance allows more current to flow, permitting Q122 to turn on sooner. The sooner it turns on, the sooner the FET turns off, increasing its frequency of operation that results in a reduced output voltage for regulation.

IMPORTANT VOLTAGES MEASURED WITH THE SET OFF:

	Voltage	DC Voltage
Q101/Drain	300Vp-p	166V
Q101/Gate	13.8Vp-p	2V
D121/Anode	16Vp-p	0V