Tektronix VX4101A Appendix D: Counter Architecture

VX4101A MultiPaq Instrument User Manual D–1
Appendix D: Counter Architecture
Channel
One X1, X10, X100
Attenuator,
AC/DC Coupling
50/1 MWImpedance
Amplifier _1
Gain=.4 to 10
20 MHz/100 MHz/Off
Filter
Offset
–1 V to +1 V
Threshold
–.5 V to +.5 V
Threshold
–.5 V to +.5 V
Comparator1_1
Hysteresis= 10 to 60 mV
Comparator1_2
Hysteresis= 10 to 60 mV
Channel
Two X1, X10, X100
Attenuator,
AC/DC Coupling
50/1 MWImpedance Amplifier _2
Gain=.4 to 10
20 MHz/100 MHz/Off
Filter
Offset
–1 V to +1 V
Threshold
–.5 V to +.5 V
Threshold
–.5 V to +.5 V
Comparator2_1
Hysteresis= 10 to 60 mV
Comparator2_2
Hysteresis= 10 to 60 mV
Threshold
–20 V to +20 V
Slope
COUNTER LOGIC
DIVIDE BY 4
PRESCALER
Channel Three
(0ption 2C)
Arm Trigger Logic