Texas Instruments TCM4300 manual Mcrw MCA0±MCA4, MCD0±MCD7 Mccsh Mccsl

3.8TCM4300 to Microcontroller Interface Timing Requirements (Motorola 8-Bit Read Cycle) (see Figure 3±8 and Note 5)

	PARAMETER	ALTERNATE	MIN	MAX	UNIT
		SYMBOL
tsu(R/W)	Setup time, read/write MCRW stable before rising edge of	TRW(SU)	0		ns
	strobe MCDS
th(R/W)	Hold time, read/write MCRW stable after falling edge of	TRW(HO)	10		ns
	strobe MCDS
tsu(RA)	Setup time, read address MCA stable before rising edge of	TRA(SU)	0		ns
	strobe MCDS
th(RA)	Hold time, read address MCA stable after falling edge of	TRA(HO)	10		ns
	strobe MCDS
ten(RD)	Enable time, read data on rising edge of strobe MCDS to	TRD(EN)	10		ns
	TCM4300 driving data bus MCD
tv(RD)	Valid time, read data on rising edge of strobe MCDS to valid	TRD(DV)		50	ns
	data MCD
tinv	Data MCD invalid after falling edge of strobe MCDS	TRD(INV)		10	ns
tdis(RD)	Disable time, read data. TCM4300 releases MDS data bus	TRD(DIS)		28	ns
	after falling edge of strobe MCDS
th(CS)	Hold time, chip select MCCSH and MCCSL stable before	TCS(HO)	0		ns
	falling edge of strobe MCDS
tsu(CS)	Setup time, chip select MCCSH and MCCSL stable before	TCS(SU)	0		ns
	rising edge of strobe MCDS

NOTE 5: Timings are based upon Motorola 68HC11D3 (3 MHz) and Motorola 68HC11G5 (2.1 MHz).

MCDS		90%	90%
(see Note A)	10%

10%

MCRW

MCA0±MCA4

tsu(R / W) 90%

tsu(RA)

th(R / W)

90%

th(RA)

MCD0±MCD7

MCCSH

MCCSL

tv(RD)	tdis(RD)
ten(RD)	tinv
90%	90%
th(CS)	tsu(CS)
10%	10%

NOTE A: Chip selection is defined as both MCCS and MCDS active.

Figure 3±8. Microcontroller Interface Timing Requirements

(Motorola 8-Bit Read Cycle, MTS [1:0] = 01)

3±8