SLWS010F | Texas Instruments TCM4300 specification

Printed in U.S.A.	SLWS010F
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Texas Instruments TCM4300 manual SLWS010F

Contents

Data Manual SLWS010F TCM4300 Data Manual Important Notice Contents Mechanical Data ±1 List of Illustrations List of Tables Features Introduction TCM4300 Functional Block Diagram VSS Pin AssignmentsPZ Package TOP View Fmrxen Terminal Functions Terminal Description Name Dvdd DsprwDspstrbl Dvss Mclkin McdsMTS1 Mcrw Synclk ScenSint Syndta Package Power Rating Above TA = 25CDissipation Rating Table Derating Factor Recommended Operating Conditions Power ConsumptionReference Characteristics Function MIN TYP² MAX Unit Terminal ImpedanceRXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Parameter Test Conditions MIN TYP MAX Unit Parameter MIN TYP MAX Unit Transmit I and Q Channel OutputsAuxiliary D/A Converters Auxiliary D/A Converters Slope Lcdcontr RSSI/Battery A/D ConverterAuxiliary D/A Converters Slope AGC, AFC, Pwrcont Nominal LSB Nominal Output Voltage Transmit TX Channel Frequency Response Digital Mode Transmit TX Channel Frequency Response Analog Mode Page VOH VOL Mclkout Timing Requirements see ±1 and NoteMclkout Mcrw Parameter Alternate MIN MAX UnitMcds MCA4±MCA0 MCD7±MCD0 Mccsh Mccsl Parameter Alternate MIN MAX Unit Symbol MCA4±MCA0 MCA4±MCA0 MCD7±MCD0 Twdho Motorola 16-Bit Read Cycle, MTS 10 = MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl MCA0±MCA4 Mcrw MCA0±MCA4 MCD0±MCD7 Mccsh Mccsl 10% ThR / W ThWA Dsprw DspcslDspstrbl Dspa Dspd ±11. TCM4300 to DSP Interface Write Cycle ±12 Mode Fmvox Iqrxen Fmrxen ±1. TCM4300 Receive Channel Control SignalsControl Signal Analog Mode Digital Mode Data Transfer ±2. RXIP, RXIN, RXQP, and Rxqn Inputs Avdd = 3 V, 4.5 V, 5 Transmit Section Modulation error percentage +100 s % ±5. Transmit TX I and Q Channel Outputs ±7. Transmit TX Channel Frequency Response Analog Mode Transmit Burst Operation Digital Mode±6. Transmit TX Channel Frequency Response Digital Mode ±1. Power Ramp-Up/Ramp-Down TIming Diagram Transmit I And Q Output Level Wide-Band Data Demodulator ±9. Bits in Control Register WBDCtrl ±8. Typical Bit-Error-Rate Performance Wbdbw =Wide-band Data Interrupts Parameter Test Conditions MIN MAX Unit Mean CNR Wide-band Data Demodulator General Information WBD ±11. Auxiliary D /A Converters Slope AGC, AFC, Pwrcont Auxiliary DACs, LCD Contrast Converter±10. Auxiliary D/A Converters Timing And Clock Generation RSSI, Battery Monitor±13. RSSI/Battery A/D Converter ±12. Auxiliary D /A Converters Slope Lcdcontr Microcontroller Clock Clock GenerationSpeech-Codec Clock Generation Sample Interrupt Sint Phase-Adjustment Strategy Mclken RCOMclkin Frequency Synthesizer Interface MSB/LSB First Clkpol Numclks LowvalHighval Syndta ±14. Synthesizer Control Fields Name Description Name Suggested External Application Reset Power Control Port15. External Power Control Signals Synclk Syndta SYNLE1 SYNLE0 Synrdy OUT1 Iqrxen Txen ModeWBD Wbdon Fmrxen Scen Fifo a Fifo B Microcontroller-DSP CommunicationsDint Cint DSP Microcontroller Register Map ±16. Microcontroller Register Map Addr Name Category Wide-Band Data/Control Register±17. Microcontroller Register Definitions ±18. WBDCtrl Register BIT Name Function Reset ValueMicrocontroller Status and Control Registers LDC D/A LCD Contrast±19. MStatCtrl Register Bits Lcden ±21. DSP Register Definitions DSP Register Map±20. DSP Register Map Dspcsl TCM4300 Dsprw Dspstrbl Sint Cint Bdint Wide-Band Data RegistersBase Station Offset Register DSP Strb INT DSP Status and Control Registers ±22. DStatCtrl Register Bits Internal Reset State ResetPower-On Reset ±23. Power-On Reset Register Initialization ±25. Microcontroller Interface Connections for Intel Mode Intel Microcontroller Mode Of Operation±24. Microcontroller Interface Configuration Microcontroller Interface Mcrw Mcds Mitsubishi Microcontroller Mode of OperationMotorola Microcontroller Mode of Operation IRQ NMI Dint CS3 ±32 Mechanical Data PZ S-PQFP-G100 Important Notice