Texas Instruments TCM4300 Clkpol Numclks Lowval, Highval, MSB/LSB First, Syndta, SYNLE0, SYNLE2

				CLKPOL	5
				NUMCLKS
					5
				LOWVAL		Control
					5
				HIGHVAL		Registers
					3
				SEL[2:0]
		Ready
			MSB/LSB FIRST
		and
		Timing Logic	SYNRDY To MStatCtrl Register
SYNDTA
	D			M		32-Bit Data	8	μ
				U		Register		C
SYNLE0	Q				32			Bus
				X
	E	SEL 0			5
	D					DMUX	MSB/LSB
SYNLE1	Q
							FIRST
	E	SEL 1	A	HIGHVAL
		S	A = B
	D	Q	B
SYNLE2	Q	R	A	LOWVAL
	E	SEL 2
			A = B
				5
		CLKPOL	B
		Clock	A	NUMCLKS
SYNCLK			B ≤ A
		Circuit
				BIT CNT
			B				303.75 KHz
				[0 . . . 31]

Figure 4±6. Synthesizer Interface Circuit Block Diagram

4±16