Texas Instruments TMS320DM36X manual MAC Address Low Bytes Register Macaddrlo, Valid

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5.43 MAC Address Low Bytes Register (MACADDRLO)

The MAC address low bytes register used in address matching (MACADDRLO), is shown in Figure 82 and described in Table 80.

Figure 82. MAC Address Low Bytes Register (MACADDRLO)

31			21	20	19	18	16
	Reserved			VALID	MATCHFILT		CHANNEL
	R-0			R/W-x	R/W-x		R/W-x
15	8	7					0
	MACADDR0				MACADDR1
	R/W-0				R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset; -x = value is indeterminate after reset

Table 80. MAC Address Low Bytes Register (MACADDRLO) Field Descriptions

Bit	Field	Value	Description
31-21	Reserved	0	Reserved
20	VALID		Address valid bit. This bit should be cleared to zero for unused address RAM locations.
		0	Address location is not valid and will not be used in determining whether or not an incoming packet
			matches or is filtered.
		1	Address location is valid and will be used in determining whether or not an incoming packet
			matches or is filtered.
19	MATCHFILT		Match or filter bit
		0	The address will be used (if the VALID bit is set) to determine if the incoming packet address
			should be filtered.
		1	The address will be used (if the VALID bit is set) to determine if the incoming packet address is a
			match.
18-16	CHANNEL	0-7h	Channel bit. Determines which receive channel a valid address match will be transferred to. The
			channel is a don't care if the MATCHFILT bit is cleared to 0.
15-8	MACADDR0	0-FFh	MAC address lower 8 bits (byte 0)
7-0	MACADDR1	0-FFh	MAC address bits 15-8 (byte 1)

SPRUFI5B –March 2009 –Revised December 2010 Ethernet Media Access Controller (EMAC)/Management Data Input/Output 119

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