Pin Assignment, Pdiag ／-CBLID, Dasp Ground | Toshiba MK6017MAP

360014937

10.3.2 Pin Assignment

The following table describes all of the pins on the Task File Interface.

Table 10.3-1 Signal pin assignment

PIN No.	SIGNALS		PIN No.	SIGNALS
1	- RESET		2	GROUND
3	DD	7	4	DD	8
5	DD	6	6	DD	9
7	DD	5	8	DD 10
9	DD	4	10	DD 11
11	DD	3	12	DD 12
13	DD	2	14	DD 13
15	DD	1	16	DD 14
17	DD	0	18	DD 15
19	GROUND		20	KEY
21	DMARQ		22	GROUND
23	- DIOW		24	GROUND
	STOP
25	-DIOR		26	GROUND
	-DMARDY
	HSTROBE
27	IORDY		28	CSEL
	-DMARDY
	-DSTROBE
29	-DMACK		30	GROUND
31	INTRQ		32	- IOCS16
33	DA 1		34	- PDIAG／-CBLID
35	DA 0		36	DA 2
37	- CS0		38	- CS1
39	- DASP		40	GROUND
41	+ 5V (LOGIC)		42	+ 5V (MOTOR)
43	GROUND		44	RESERVED

Note) Symbol (-) in front of signal name shows negative logic.

Copyright © 2000 Toshiba corporation. All rights reserved.

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Toshiba MK6017MAP manual Pin Assignment, Pdiag ／-CBLID, Dasp Ground, Ground Reserved

Contents

Toshiba REV ContentsRevised STGE.PER Ｓａｆｅｔｙ Usage Restrictions Safety Copyright 2000 Toshiba corporation. All rights reserved 506 Table of Contents Security SET Password Protocol Table of Figures Scope Copyright 2000 Toshiba corporation. All rights reserved 512 KEY Features Basic Specification Performance Power Sequence Power ConsumptionSupply Voltage Energy Consumption Efficiency Weight DimensionDrive Orientation Mounting Instructions Screwing Installation MK6017MAP Dimensions MK6017MAP Mounting Recommendation Temperature Temperature and HumidityVibration Shock Altitude Acoustics （Sound Power ）Safety Standards Preventive Maintenance PM Error RateMean Time to Failure Mttf Product Life Load/Unload Cable Interface ConnectorCabling DC input/output Characteristics 10.2.2.1 Input Electrical specificationCable length and capacitance Output ATA interface connector Interface connector Pdiag ／-CBLID Pin AssignmentDasp Ground Ground Reserved Dasp Signal Treatment Series resistance Signal Description Copyright 2000 Toshiba corporation. All rights reserved 532 Program I/O Write Timing Host Interface Timing Program I/O Read Timing Single Word DMA Write Timing ATA-2 Specifications Single Word DMA Read Timing ATA-2 Specification Multiword DMA Write Timing ATA/ATAPI-5 Specifications Multiword DMA Read Timing Hdmardy Ultra DMA Timing Sustained Ultra DMA data in burst CRC Device terminating an Ultra DMA data in burst Host terminating an Ultra DMA data in burst Ddmardy Initiating an Ultra DMA data out burst Sustained Ultra DMA data out burst Host terminating an Ultra DMA data out burst Device terminating an Ultra DMA data out burst ATA/ATAPI specifications Grounding Reset Timing 1 Register map Address Decoding Register Description Operational Mode Security commandsError Register Smart command Diagnostic ModeDisk Access command Initialize Device Parameters command Sector Number Register Smart commandsCylinder Low Registers Cylinder High Registers DEV HS3 HS2 HS1 HS0 Device/Head Register BSY Drdy DSC3 DRQ Corr IDX ERR Status Register Command Register Command Code Device Control Register Alternate Status RegisterDevice Address register4 Srst IEN Command Descriptions Flush Cache E7h Nop 00hRecalibrate5 1xh Write Sector 30h/31h Read Sector 20h/21hRead Long6 22h/23h Write Verify8 3Ch Write Long7 32h/33hRead Verify 40h Format Track 50h Toshiba Specific Execute Diagnostics 90hSeek 7xh Initialize Device Parameters 91h Read Multiple C4h Write Multiple C5h Read DMA C8h/C9h Set Multiple Mode C6h Write DMA CAh/CBh Stand-by Immediate E0/94 Power Control ExhIdle Immediate E1/95 SC=X Stand-by E2/96 Check Power Mode E5/98Idle E3/97 Sleep E6/99 Write Buffer E8h Read Buffer E4h Identify Device ECh Hex Word Description 360014937 2 Identify Information 360014937 3 Identify Information 360014937 4 Identify Information =ATA Toshiba MK6017MAP MK6017MAP Copyright 2000 Toshiba corporation. All rights reserved 581 Copyright 2000 Toshiba corporation. All rights reserved 582 Copyright 2000 Toshiba corporation. All rights reserved 583 Timer Actual Value Copyright 2000 Toshiba corporation. All rights reserved 585 Read Native Max Address F8h Set Max Address F9h Features FT register defines following selections Set Features EFh Security Set Password information Security SET Password F1h Security Erase Prepare F3h Security Unlock F2h Security Freeze Lock F5h Security Erase Unit F4h F6h Security Disable Password Smart Function Set Smart Read Attribute values 10.8.33.1 Attribute Name Value Definition Copyright 2000 Toshiba corporation. All rights reserved 596 Smart Read Attribute thresholds 10.8.33.2 10.8.33.4 Smart Save Attribute Values Smart Enable Disable Attribute Autosave 10.8.33.5 Smart Execute Off-line Immediate Off-line mode Captive mode Register Setting Normal Completion Command Code10.8.33.6 Register Command data structure Error data structure Self-test log sector Self-test index 10.8.33.7 Smart Write Log Sector 10.8.33.9 Smart Disable Operations Smart Enable Operations Smart Return Status Smart Enable/Disable Automatic Off-line Initial setting of the user password Security mode default setting Unit Security mode operation from power-onUnlock Password lost Command Table Attributes values Smart function default settingAttributes Low Power Idle Adaptive Power Mode ControlPerformance Idle Active Idle Register Power on Hardware Reset Software Reset Reset High Master/Slave ConfigurationLOW Cache Operations Cache MemoryAutomatic Write Reallocation Protocol Commands for this class are PIO data in commands PIO data out protocol PIO data out commands Non-data protocol Non-data commands DMA data transfer commands Ultra DMA Copyright 2000 Toshiba corporation. All rights reserved 624 = DD1 XOR CRCOUT14 = DD0 XOR CRCOUT15= DD2 XOR CRCOUT13 = DD3 XOR CRCOUT12 Other timings Function and Intervals Timeout