6-2. Each IC Description
6-2-1. PLL IC CXA3106Q (QX028) for RGB Signals
Aconfiguration of CXA3106Q is shown in Fig.
The VCO, phase comparator, loop filter and frequency dividing circuit are built in the IC, so the IC can generate the clock signal by itself.
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| RC 1 | RC 2 |
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| 1 bit |
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| ON/OFF |
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VCO | TTLIN |
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| 1 - 4 CLK |
| TTLOUT | DSYNC |
(TTL) |
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| (TTL) | ||
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| LATCH | COARSE | POLARITY |
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VCO |
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| DELAY |
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PECLIN |
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| PECLOUT | |||
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(PECL) |
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| (PECL) | ||
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| 2 bits | 1 bit | 1 bit |
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| LOGIC |
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SYNC | TTLIN |
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| TTLOUT | CLK |
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| (TTL) | |||
(TTL) |
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| 1 bit |
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| POLARITY |
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SYNC |
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| ON/OFF |
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PECLIN |
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| 1/16 | 20/16 CLK |
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(PECL) |
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| NCLK | ||||
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| TTLOUT | ||
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| PHASE | CHARGE | FINE |
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| (TTL) | |||
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| VCO | MUX | DIV |
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| 1 bit |
| DETECTOR | PUMP |
| DELAY |
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| CLK | |
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| PECLOUT | |
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| 1 bit | 2 bits | 5 bits |
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| 1 bit | 2 bits |
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| 1/256 | 1/4096 |
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| 1 bit |
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| PROGRAMMABLE |
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| ON/OFF |
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| CLK/2 | |||
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| COUNTER |
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| TTLOUT | |||
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HOLD |
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TTLIN |
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| 1 bit |
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(TTL) |
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| 12 bits |
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| REST |
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| ON/OFF |
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| 1/2 | TTLOUT | NCLK/2 |
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| (TTL) | ||
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| PECLOUT | CLK/2 |
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| (PECL) | |
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| 1 bit |
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| ON/OFF |
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| UNLOCK | UNLOCK |
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| DETECT | |
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| ON/OFF | 1 bit | ON/OFF | 1 bit |
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| SYNTHESIZER | WHOLE CHIP |
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| READ OUT | TTLOUT |
| TTLIN | POWER SAVE | POWER WAVE | PECL | VBB | ||||
| DAC | CONTROL REGISTER |
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| TTLOUT |
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| 1 bit |
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1 REF |
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SENABLE SCLK SDATA | SEROUT | DIVOUT TLOAD | CS |
Fig.