Itanium® 2 Processor Package Thermocouple Location | 77 | |
Logical Schematic of SMBus Circuitry | 80 |
Tables
Itanium® 2 Processor System Bus Signal Groups | 16 | |
Itanium® 2 Processor Package Specifications | 17 | |
Itanium® 2 Processor Power Supply Specifications | 18 | |
AGTL+ Signals DC Specifications | 18 | |
Power Good Signal DC Specifications | 19 | |
System Bus Clock Differential HSTL DC Specifications | 19 | |
TAP Connection DC Specifications | 19 | |
SMBus DC Specifications | 20 | |
LVTTL Signal DC Specifications | 20 | |
System Bus Clock Differential HSTL AC Specifications | 20 | |
SMBus AC Specifications | 21 | |
Itanium® 2 Processor Absolute Maximum Ratings | 22 | |
Source Synchronous AGTL+ Signal Group and |
| |
| Absolute Overshoot/Undershoot Tolerance | 26 |
Itanium® 2 Processors (900 MHz, 1.0 GHz, 1.3 GHz, 1.4 GHz, 1.5 GHz/6 MB) |
| |
| Source Synchronous AGTL+ Signal Group Time Dependent |
|
| Overshoot/Undershoot Tolerance for 400 MHz System Bus | 26 |
Itanium® 2 Processors (1.5 GHz/4 MB, 1.6 GHz) Source |
| |
| Synchronous AGTL+ Signal Group |
|
| Overshoot/Undershoot Tolerance for 400 MHz System Bus | 27 |
Itanium® 2 (9 MB) Processors Source Synchronous AGTL+ |
| |
| Signal Group |
|
| for 533 MHz System Bus | 27 |
Itanium® 2 Processors (1.66 GHz) Source Synchronous AGTL+ |
| |
| Signal Group |
|
| for 667 MHz System Bus | 28 |
Itanium® 2 Processors (900 MHz, 1.0 GHz, 1.3 GHz, 1.4 GHz, |
| |
| 1.5 GHz/6 MB) |
|
| (BINIT#, HIT#, HITM#, BNR#, TND#, BERR#) |
|
| Overshoot/Undershoot Tolerance for 400 MHz System Bus | 28 |
Itanium® 2 Processors (1.5 GHz/4 MB, 1.6 GHz) |
| |
| Group (BINIT#, HIT#, HITM#, BNR#, TND#, BERR#) |
|
| Overshoot/Undershoot Tolerance for 400 MHz System Bus | 29 |
Itanium® 2 (9 MB) Processors |
| |
| (BINIT#, HIT#, HITM#, BNR#, TND#, BERR#) Overshoot/Undershoot |
|
| Tolerance for 533 MHz System Bus | 29 |
Itanium® 2 (1.66 GHz) Processors |
| |
| (BINIT#, HIT#, HITM#, BNR#, TND#, BERR#) Overshoot/Undershoot |
|
| Tolerance for 667 MHz System Bus | 29 |
Itanium® 2 Processor Power Pod Connector Signals | 30 | |
Processor Core Voltage Identification Code | 31 | |
Processor Power States | 32 | |
Itanium® 2 Processor System Bus Ratios | 33 | |
Connection for Unused Pins | 35 | |
Pin/Signal Information Sorted by Pin Name | 38 | |
Pin/Signal Information Sorted by Pin Location | 53 | |
Case Temperature Specification | 76 | |
System Management Interface Signal Descriptions | 79 |
6 | Datasheet |