Contents
1 | Introduction | 11 | ||
| 1.1 | Overview | 11 | |
| 1.2 | Processor Abstraction Layer | 11 | |
| 1.3 | Mixing Processors of Different Frequencies and Cache Sizes | 12 | |
| 1.4 | Terminology | 12 | |
| 1.5 | State of Data | 12 | |
| 1.6 | Reference Documents | 13 | |
2 | Electrical Specifications | 15 | ||
| 2.1 | Itanium® 2 Processor System Bus | 15 | |
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| 2.1.1 System Bus Power Pins | 15 | |
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| 2.1.2 System Bus No Connect | 15 | |
| 2.2 | System Bus Signals | 15 | |
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| 2.2.1 | Signal Groups | 15 |
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| 2.2.2 | Signal Descriptions | 16 |
| 2.3 | Package Specifications | 17 | |
| 2.4 | Signal Specifications | 18 | |
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| 2.4.1 | Maximum Ratings | 22 |
| 2.5 | System Bus Signal Quality Specifications and Measurement Guidelines | 23 | |
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| 2.5.1 | Overshoot/Undershoot Magnitude | 23 |
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| 2.5.2 | Overshoot/Undershoot Pulse Duration | 24 |
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| 2.5.3 | Activity Factor | 24 |
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| 2.5.4 Reading Overshoot/Undershoot Specification Tables | 25 | |
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| 2.5.5 Determining if a System Meets the Overshoot/Undershoot |
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| Specifications | 25 |
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| 2.5.6 | 28 | |
| 2.6 | Power Pod Connector Signals | 30 | |
| 2.7 | Itanium® 2 Processor System Bus Clock and Processor Clocking | 32 | |
| 2.8 | Recommended Connections for Unused Pins | 35 | |
3 | Pinout Specifications | 37 | ||
4 | Mechanical Specifications | 69 | ||
| 4.1 | Mechanical Dimensions | 69 | |
| 4.2 | Package Marking | 72 | |
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| 4.2.1 | Processor | 72 |
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| 4.2.2 | Processor | 72 |
5 | Thermal Specifications | 75 | ||
| 5.1 | Thermal Features | 75 | |
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| 5.1.1 | Thermal Alert | 75 |
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| 5.1.2 | Enhanced Thermal Management | 76 |
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| 5.1.3 | Thermal Trip | 76 |
| 5.2 | Case Temperature | 76 | |
6 | System Management Feature Specifications | 79 | ||
| 6.1 | System Management Bus | 79 | |
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| 6.1.1 System Management Bus Interface | 79 | |
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| 6.1.2 System Management Interface Signals | 79 |
Datasheet | 3 |