Intel Itanium 2 Processor manual Pinout Specifications

Page 37

3Pinout Specifications

This chapter describes the Itanium 2 processor signals and pinout.

Note: The pins labeled “N/C” must remain unconnected. The Itanium 2 processor uses a JEDEC standard pin naming convention.

In this chapter, pin names are the actual names given to each physical pin of the processor. System bus signal names are the names associated with the functions of those pins. For those pins associated with multiple functions, their pin names and system bus signal names are not necessarily identical.

Figure 3-1shows the Itanium 2 processor pin location diagram from the top view.

Figure 3-1. Itanium® 2 Processor Pinout

AH AG AF AE AD AC AB AA Y W V U T R P N M L K J H G F E D C B A

1

 

GND

 

GND

 

GND

 

GND

 

GND

 

GND

VC

GND

 

GND

VC

 

GND

 

VC

GND

 

GND

VC

 

1

GND

 

 

 

 

 

 

 

 

 

 

 

GND

2

 

 

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

2

GND TERMA GND

ID0#

GND

ID1#

GND

A07#

GND

A04#

VC

D30#

GND

D27#

VC

D20#

GND

NC

VC

D11#

GND

D07#

VC

D04#

GND

3.3V

 

VC

3

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

TUNER[1] TUNER[2]

TERMB GND

ID2#

GND

ID3#

GND

A06#

GND

A05#

GND

D25#

GND

D23#

GND

D17#

GND

D13#

GND

D14#

GND

D01#

GND

NC

GND

GND

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

GND OUTEN

ID4#

 

ID5#

 

A13#

 

A10#

GND DEP3#

VC

D24#

GND STBP1# VC

D16#

GND

D12#

VC STBN0# GND

D03#

VC

NC

NC

5

 

 

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC

NC

GND

ID6#

GND

ID7#

GND

A11#

GND

A12#

GND

NC

GND

D29#

GND STBN1# GND

D19#

GND DEP1# GND

D08#

GND STBP0# GND

D02#

GND

GND

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

GND

RSP#

 

ID8#

 

ID9#

 

A08#

 

A03#

VC

DEP2#

 

D26#

VC

D28#

 

D18#

VC

D09#

 

D06#

VC

D05#

GND

NC

VC

7

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

TDO

TDI

GND

RS0# GND

IDS#

GNDDRDY0# GND

A14#

GND

A09#

GND

D31#

GND

D22#

GND

D21#

GND DEP0# GND

D15#

GND

D10#

GND

D00#

GND THRM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ALERT#

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

GND INIT#

 

RS1#

 

RS2#

 

A17#

 

A15#

 

DEP6#

VC

D54#

 

D48#

VC

D49#

GND

D42#

VC

D45#

GND

D37#

VC

NC

GND

9

 

 

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

9

 

GND REQ0# GND DBSY# GND DSBY0# GND

 

 

 

GND

D63#

GND

 

GND

D53#

GND DEP4# GND

D38#

 

 

 

 

 

TMS

TCK

A21#

GND

A18#

D58#

GND

D40#

GND

D35#

GND VSSMON

10

GND REQ1#

REQ2#

 

HIT#

 

A24#

 

A20#

VC

DEP7#

 

D61#

VC STBP3#

D50#

VC

D32#

STBN2# VC

D34#

GND

 

10

 

 

 

 

 

GND VCTERM

11

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC

NC

GND REQ3# GND DRDY# GND

A23#

GND

A26#

GND

NC

GND

D60#

GND STBN3# GND

D56#

GND DEP5# GND

D41#

GND STBP2# GND

D33#

GNDVCCMON

12

GND REQ4#

REQ5#

 

HITM#

 

A25#

 

A19#

 

D62#

VC

D57#

 

D51#

VC

NC

GND

D46#

VC

D44#

GND

D36#

VC

 

12

 

 

 

 

 

 

 

 

13

 

 

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BCLKN

BCLKPGND SBSY# GND

RP#

GND SBSY0# GND

A22#

GND

A16#

GND

D59#

GND

D55#

GND

D52#

GND

D47#

GND

D43#

GND

D39#

GND

NC

GND

GND

14

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

 

GND TRDY#

GSEQ#

 

DEFER#

 

A34#

 

A31#

VC

D94#

 

D87#

VC

D84#

 

NC

VC

D75#

 

D68#

VC

D65#

GND

NC

VC

15

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

PROC GND LOCK# GND TND#

GND BINIT# GND

A37#

GND

A28#

GND

D92#

GND

D91#

GND

D81#

GND

D78#

GND

D71#

GND

D67#

GND

NC

 

15

PWR

GND SMA2

GOOD

PRES#

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

16

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND BREQ0#

BREQ1#

 

NC

 

A36#

 

A38#

DEP11# VC

D93#

STBP5# VC

D83#

GND

D76#

VC STBN4# GND

D66#

VC

NC

GND

17

 

 

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

17

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC

NC

NC

GND

NC

GND

A33#

GND

A32#

GND BNR# GND

D89#

GND STBN5# GND

D88#

GND DEP9# GND

D72#

GND STBP4# GND

D73#

GND SMA1

18

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18

 

GNDBREQ3#

NC

 

BREQ2#

 

A35#

 

A29#

VC DEP10#

D95#

VC

D86#

 

D80#

VC

D77#

 

D69#

VC

D64#

GND SMA0

VC

19

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

NC

NC

GND BPRI# GND SBSY1# GND DBSY1# GND

A30#

GND

A27#

GND

D90#

GND

D85#

GND

D82#

GND DEP8# GND

D79#

GND

D74#

GND

D70#

GND

GND

20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20

 

GND PPOD

 

RESET#

 

ADS#

GND

A39#

 

A45#

GND DEP14# VC

D122# GND D118#

VC

D117# GND D111#

VC

D106# GND D102#

VC

NC

GND

21

 

GD#

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

21

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC

NC

GND TRST# GND

NC

GNDDRDY1# GND

A44#

GND

A48#

GND D124# GND D127# GND D112# GND DEP12# GND D101# GND

D96#

GND

D99#

GND SMWP

22

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

 

GND LINT0

 

BPM0#

 

BERR#

 

A49#

 

A47#

VC DEP15#

D125#

VC STBP7#

D114#

VC

D105#

 

STBN6# VC

D98#

GND SMSD

VC

23

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

23

A20M# IGNNE#

 

BPM2# GND BPM3# GND

AP1#

GND

A46#

GND

A42#

GND D126# GND STBN7# GND D116# GND DEP13# GND D108# GND STBP6# GND

D97#

GND

GND

24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24

 

GND LINT1 GND BPM4# GND BPM5# GND

A43#

 

A40#

GND D123#

VC

D120# GND D115#

VC

NC

GND D109#

VC

D103# GND D104#

VC

SMSC GND

25

 

 

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

 

 

TERM

 

25

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FERR#

TH_TRIP#

PMI#

GND BPM1# GND

AP0#

GND

A41#

GND

VC

GND D121# GND D119# GND D113# GND D110# GND D107# GND D100# GND

NC

GND

VC

 

 

 

 

 

 

 

 

 

 

 

TERM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TERM

AH AG AF AE AD AC AB AA Y W V U T R P N M L K J H G F E D C B A

Power Pod

000638b

Datasheet

37

Image 37
Contents Intel Itanium 2 Processor DatasheetDatasheet Contents Processor Information ROM and Scratch Eeprom Supported Figures BINIT#, HIT#, HITM#, BNR#, TND#, BERR# Tables106 Revision No Description Date Revision HistoryIntel Itanium 2 Processor Product FeaturesDatasheet Processor Abstraction Layer OverviewTerminology Mixing Processors of Different Frequencies and Cache SizesState of Data Title Document Number Reference DocumentsIntroduction System Bus Power Pins System Bus SignalsSignal Groups Itanium 2 Processor System BusItanium 2 Processor System Bus Signal Groups Signal DescriptionsGroup Name Signals Itanium 2 Processor Package Specifications Package SpecificationsSymbol Parameter Core Minimum Typ Maximum Unit Itanium 2 Processor Power Supply Specifications Signal SpecificationsAGTL+ Signals DC Specifications Sheet 1 Symbol Parameter Minimum Typ Maximum UnitPower Good Signal DC Specifications AGTL+ Signals DC Specifications Sheet 2System Bus Clock Differential Hstl DC Specifications TAP Connection DC SpecificationsLvttl Signal DC Specifications SMBus DC SpecificationsSystem Symbol Parameter Minimum Typ Maximum UnitMinimum Typ Maximum 11. SMBus AC Specifications12. Itanium 2 Processor Absolute Maximum Ratings Sheet 1 Maximum Ratings12. Itanium 2 Processor Absolute Maximum Ratings Sheet 2 Overshoot/Undershoot MagnitudeActivity Factor Overshoot/Undershoot Pulse DurationVcterm Reading Overshoot/Undershoot Specification TablesAbsolute Pulse Duration ns Parameter Description Specification UnitsOver AF = 1 Shoot0143 Wired-OR Signals 0513 22. Itanium 2 Processor Power Pod Connector Signals Power Pod Connector SignalsGroup Name Signals Power Pod Connector AbsoluteVID2 VID1 VID0 23. Processor Core Voltage Identification Code1Itanium 2 Processor System Bus Clock and Processor Clocking 24. Processor Power StatesState Transition Ramp Rate Comment Ratio of Bus Frequency A21# A20# A19# A18# A17# 25. Itanium 2 Processor System Bus RatiosSystem Bus Reset and Configuration Timings for Cold Reset 26. Connection for Unused Pins Sheet 1 Recommended Connections for Unused PinsPins/Pin Groups Recommended TAP SignalsSystem Management Signals 26. Connection for Unused Pins Sheet 2Lvttl Power Pod Signals Reserved PinsPinout Specifications Pin Name System Bus Input/Output Signal Name Pin/Signal Information Sorted by Pin Name Sheet 1Pin Name System Bus Input/Output Pin/Signal Information Sorted by Pin Name Sheet 2Pin/Signal Information Sorted by Pin Name Sheet 3 Pin/Signal Information Sorted by Pin Name Sheet 4 Pin/Signal Information Sorted by Pin Name Sheet 5 Pin/Signal Information Sorted by Pin Name Sheet 6 Pin/Signal Information Sorted by Pin Name Sheet 7 Pin/Signal Information Sorted by Pin Name Sheet 8 Pin/Signal Information Sorted by Pin Name Sheet 9 Pin/Signal Information Sorted by Pin Name Sheet 10 Pin/Signal Information Sorted by Pin Name Sheet 11 Pin/Signal Information Sorted by Pin Name Sheet 12 Pin/Signal Information Sorted by Pin Name Sheet 13 Pin/Signal Information Sorted by Pin Name Sheet 14 Pin/Signal Information Sorted by Pin Name Sheet 15 Location Pin/Signal Information Sorted by Pin Location Sheet 1Pin/Signal Information Sorted by Pin Location Sheet 2 Pin/Signal Information Sorted by Pin Location Sheet 3 Pin/Signal Information Sorted by Pin Location Sheet 4 Pin/Signal Information Sorted by Pin Location Sheet 5 Pin/Signal Information Sorted by Pin Location Sheet 6 Pin/Signal Information Sorted by Pin Location Sheet 7 Pin/Signal Information Sorted by Pin Location Sheet 8 Pin/Signal Information Sorted by Pin Location Sheet 9 Pin/Signal Information Sorted by Pin Location Sheet 10 Pin/Signal Information Sorted by Pin Location Sheet 11 Pin/Signal Information Sorted by Pin Location Sheet 12 Pin/Signal Information Sorted by Pin Location Sheet 13 Pin/Signal Information Sorted by Pin Location Sheet 14 Pin/Signal Information Sorted by Pin Location Sheet 15 Pinout Specifications Itanium 2 Processor Package Mechanical DimensionsSubstrate Units ProcessorItanium 2 Processor Package Power Tab Processor Top-Side Marking Package MarkingProcessor Bottom-Side Marking Processor Bottom-Side Marking Placement on Interposer Mechanical Specifications Thermal Alert Thermal FeaturesCase Temperature Specification Case TemperatureSymbol Parameter Core Minimum Maximum Unit Enhanced Thermal ManagementItanium 2 Processor Package Thermocouple Location Thermal Specifications System Management Interface Signal Descriptions System Management Interface SignalsSignal Name Pin Count Description System Management BusSystem Management Feature Specifications 9Xh SMBus Device AddressingEeprom SMBus Addressing on the Itanium 2 Processor Processor Information ROMProcessor Information ROM Format Sheet 1 Offset Function Examples Section Bits Processor Information ROM Format Sheet 2Cache Processor Information ROM Format Sheet 3 FeaturesOffset Function Examples Section Bits Package Part NumbersProcessor Information ROM Format Sheet 4 Scratch EepromOther Current Address Read SMBus Packet Thermal Sensing DeviceRandom Address Read SMBus Packet Byte Write SMBus PacketThermal Sensing Device Supported SMBus Transactions Register Command Reset State Function 13. Command Byte Bit AssignmentThermal Sensing Device Registers Thermal Reference Registers15. Thermal Sensing Device Configuration Register Configuration RegisterThermal Limit Registers Status RegisterConversion Rate Register Register Contents Conversion Rate Hz16. Thermal Sensing Device Conversion Rate Register Alphabetical Signals Reference ATTR30# I/O Table A-2. Effective Memory Type Signal EncodingBCLKp/BCLKn 8 BE70# I/OSpecial Transaction Byte Enables70# Table A-3. Special Transaction Encoding on Byte EnablesBERR# I/O 11 BNR# I/O BINIT# I/O12 BPM50# I/O BPRI#Bus Signal Agent 0 Pins Agent 3 Pins Table A-6. BR30# Signals and Agent IDsBREQ30# I/O Pin SampledD1270# I/O CCL# I/O# I/O DBSYC1# ODEFER# DBSYC2# O24 DEN# I/O 25 DEP150# I/ODRDY# I/O 27 DPS# I/ODRDYC1# O DRDYC2# OFERR# O 33 FCL# I/OHIT# I/O and HITM# I/O ID90#LEN20# I/O IP10#Table A-9. Length of Data Transfers LEN20#OWN# I/O LINT10PMI# REQ50# I/O52 RP# I/O RESET#Transaction REQa50# REQb50# RSP# RS20#SBSYC1# O SBSYC2# OTDO O STBn70# and STBp70# I/OTHRMTRIP# O Table A-11. STBp70# and STBn70# AssociationsTable A-12. Output Signals Sheet 1 Signal SummariesName Active Level Clock Signal Group TND# I/OTable A-13. Input Signals Table A-12. Output Signals Sheet 2Name Active Level Clock Signal Group Qualified Table A-15. Input/Output Signals Multiple Driver Table A-14. Input/Output Signals Single Driver108