Intel MultiProcessor manual Constructing the MP Configuration Table, Nmi

MultiProcessor Specification

mov	esi,LVT1
mov	eax,[esi]	; read LVT1
and	eax,0FFFE00FFH	; not masked, edge, active high
or	eax,000005700H	;	ExtInt
mov	[esi],eax	;	write LVT1

;

;Program LVT2 as NMI, which delivers the signal on the NMI signal of all

;processors' cores listed in the destination.

;
mov	esi,LVT2
mov	eax,[esi]	; read LVT2
and	eax,0FFFE00FFH	; not masked, edge, active high
or	eax,000005400H	; NMI
mov	[esi],eax	; write LVT2
extrn	pmode_off : near
call	pmode_off	; switch back to real mode
pop	ax	; restore imr settings
out	0a1h,al	; restore secondary imr
pop	ax
out	021h,al	; restore primary imr
		; this routine leaves NMI disabled
pop	esi	; restore regs used in APIC init
pop	es	; (unless also saved for CPUID)
pop	ds
ret
InitLocalAPIC	endp

Example A-1. Programming Local APIC for Virtual Wire Mode (continued)

A.4 Constructing the MP Configuration Table

For a compliant system, one of the main functions of the system BIOS is to construct the MP floating pointer structure and the MP configuration table. Because the MP configuration table is optional, the BIOS must set the MP feature information bytes in the MP floating pointer structure to indicate whether an MP configuration table is present.

If the MP configuration table is required, the BIOS constructs it in conjunction with the BSP and APs. The BIOS is responsible for synchronizing the activities of the APs during the construction of the table. The BIOS may need some synchronization during processor initialization so that each processor may be brought up in the proper order. The mechanism for synchronization is not specified; however, the procedure described in the following paragraphs of this section uses AP status flags as an example of a synchronization mechanism. This procedure also initializes the APs serially. System developers may employ other mechanisms and may initialize all processors in parallel to minimize the system start-up time.

The BIOS maintains an initialized AP status flag for each AP. Each AP will begin executing the same BIOS code as the BSP, but will eventually be put in a HALT state or held in a loop until the BSP enables its AP status flag.

A-4 Version 1.4