Intel® 5100 MCH Chipset
Figure 1. Thermal Design Process
Step 1: Thermal Simulation |
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• | Package Level Thermal Models |
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• | Thermal Model User’s Guide | Step 2: Heatsink Design |
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| and Selection |
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| • | Reference Heatsinks |
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| • | Reference Mounting Hardware | Step 3: Thermal Validation | |
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| • | Vendor Contacts | ||
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| • | Thermal Testing Software |
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| • | Thermal Test Vehicle |
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| • | User Guides |
1.2Definition of Terms
Table 1. | Definition of Terms |
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| Term | Definition |
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| Flip Chip Ball Grid Array. A package type defined by a plastic substrate where |
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| a die is mounted using an underfill C4 (Controlled Collapse Chip Connection) |
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| attach style. The primary electrical interface is an array of solder balls |
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| attached to the substrate opposite the die. |
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| Note: The device arrives at the customer with solder balls attached. |
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| BLT | Bond line thickness. Final settled thickness of the thermal interface material |
| after installation of heatsink. | |
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| ICH9 | I/O Controller Hub 9 |
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| IHS | Integrated Heat Spreader |
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| Memory controller hub. The chipset component that contains the processor |
| MCH | interface, the memory interface, the PCI Express* interface and the ESI |
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| interface. |
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| Tcase_max | Maximum allowed component temperature. This temperature is measured at |
| the geometric center of the top of the package IHS. | |
| Tcase_min | Minimum allowed component temperature. This temperature is measured at |
| the geometric center of the top of the package IHS. | |
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| Thermal design power. Thermal solutions should be designed to dissipate |
| TDP | this target power level. TDP is not the maximum power that the chipset can |
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| dissipate. |
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| TIM | Thermal Interface Material |
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| ΨCA | |
| thermal solution thermal performance including TIM using the thermal | |
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| design power. Defined as (TCASE - TLA) / TDP |
| ΨCS | |
| thermal performance using the thermal design power. Defined as (TCASE - | |
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| TLA) / TDP |
| ΨSA | |
| thermal performance using the thermal design power. Defined as (TCASE - | |
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| TLA) / TDP |
Intel® 5100 Memory Controller Hub Chipset for Communications, Embedded, and Storage Applications
July 2008 | TDG |
Order Number: | 7 |