Intel 82555 manual Repeater Mode

Page 4

82555 — Networking Silicon

Contents

 

 

5.3.3

10BASE-T Error Detection and Reporting

22

 

5.4

10BASE-T Collision Detection

22

 

5.5

10BASE-T Link Integrity

22

 

5.6

10BASE-T Jabber Control Function

22

 

5.7

10BASE-T Full Duplex

23

6.0

REPEATER MODE

....................................................................................................................

25

 

6.1

Special Repeater Features

25

 

6.2

Connectivity

25

7.0

MANAGEMENT DATA INTERFACE

27

 

7.1

MDI Frame Structure

27

 

7.2

MDI Registers

28

 

 

7.2.1

MDI Registers 0 - 7

28

 

 

7.2.2

MDI Registers 8 - 15

31

 

 

7.2.3

MDI Registers 16 - 31

31

8.0

AUTO-NEGOTIATION FUNCTIONALITY

35

 

8.1

Description

....................................................................................................................

35

 

8.2

Parallel Detect and Auto-Negotiation

36

9.0

LED DESCRIPTIONS

39

10.0

RESET AND MISCELLANEOUS TEST MODES

41

 

10.1

Reset

41

 

10.2

Loopback

41

 

10.3

Scrambler Bypass

41

 

10.4

Test Port

41

11.0

ELECTRICAL SPECIFICATIONS AND TIMING PARAMETERS

43

 

11.1

Absolute Maximum Ratings

43

 

11.2

General Operating Conditions

43

 

11.3

DC Characteristics

43

 

 

11.3.1

MII DC Characteristics

43

 

 

11.3.2

10BASE-T Voltage/Current DC Characteristics

43

 

 

11.3.3

100BASE-TX Voltage/Current DC Characteristics

44

 

11.4

AC Characteristics

45

 

 

11.4.1

MII Clock Specifications

45

 

 

11.4.2

MII Timing Parameters

46

 

 

11.4.3

Repeater Mode Timing Parameters

47

 

 

11.4.4

Transmit Packet Timing Parameters

48

 

 

11.4.5

Squelch Test Timing Parameters

48

 

 

11.4.6

Jabber Timing Parameters

49

 

 

11.4.7

Receive Packet Timing Parameters

49

 

 

11.4.8

10BASE-T Normal Link Pulse (NLP) Timing Parameters

50

 

 

11.4.9

Auto-Negotiation Fast Link Pulse (FLP) Timing Parameters

50

 

 

11.4.10

Reset Timing Parameters

51

 

 

11.4.11

X1 Clock Specifications

51

 

 

11.4.12

100BASE-TX Transmitter AC Specification

52

12.0

82555 PACKAGE INFORMATION

53

iv

Datasheet

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Contents Product Features 82555 10/100 Mbps LAN Physical Layer InterfaceNetworking Silicon Revision DescriptionContents Repeater Mode Functional Overview IntroductionCompliance to Industry Standards Networking Silicon 100 Mbps Mode Architectural Overview10 Mbps Mode MII TX InterfaceMedia Independent Interface MII Repeater mode only Transmit Error From RICYes Pin Definitions Pin Numbers and LabelsClock Pins Twisted Pair Ethernet TPE PinsMedia Independent Interface MII Pins Pin TypesMedia Access Control/Repeater Interface Control Pins LED Pins External Bias PinsMiscellaneous Control Pins VCC Power and Ground PinsVSS 100BASE-TX Adapter Mode Operation Symbol 5B Symbol Code 4B Nibble Code100BASE-TX Transmit Clock Generation 100BASE-TX Transmit Blocks2 100BASE-TX Scrambler and MLT-3 Encoder InvalidNRZ to MLT-3 Encoding Diagram 3 100BASE-TX Transmit FramingTransmit Driver 100BASE-TX Receive BlocksVendor Model/Type 100BASE-TX Collision Detection 100BASE-TX Link Integrity and Auto-Negotiation Solution Combination Tx/T4 Auto-Negotiation SolutionLink Integrity Auto-NegotiationAdapter Mode Addresses Auto 10/100 Mbps Speed SelectionNetworking Silicon Datasheet 10BASE-T Functionality in Adapter Mode 10BASE-T Transmit Clock Generation10BASE-T Transmit Blocks 10BASE-T Receive Blocks3 10BASE-T Error Detection and Reporting 10BASE-T Collision Detection10BASE-T Link Integrity 10BASE-T Jabber Control Function10BASE-T Full Duplex Networking Silicon Datasheet Special Repeater Features Repeater ModeConnectivity Clock Signal Example Management Data Interface MDI Frame StructureBits Name Description Default MDI RegistersMDI Registers 0 TransitionRegister 1 Status Register Bit Definitions 10BASE-TRegister 2 82555 Identifier Register Bit Definitions MDI Registers 8 MDI Registers 16Register 17 82555 Special Control Bit Definitions 100BASE-TX150 Register 22 Receive Symbol Error Counter Bit Definitions Actled LiledBit Setting Technology Auto-Negotiation FunctionalityDescription Priority TechnologyParallel Detect and Auto-Negotiation PriorityAuto-Negotiation and Parallel Detect Networking Silicon Datasheet LED Descriptions Networking Silicon Datasheet Reset and Miscellaneous Test Modes ResetLoopback Scrambler BypassTest Instruction Coding Number Code Test Instruction Select Input to ToutElectrical Specifications and Timing Parameters DC CharacteristicsAbsolute Maximum Ratings General Operating Conditions11.3.3 100BASE-TX Voltage/Current DC Characteristics Total supply current 230 Leakage on analog pinsMII Clock Specifications AC CharacteristicsSymbol Parameter Conditions Min Typ Max Units MII Timing Parameters MII Clocks AC TimingRepeater Mode Timing Parameters RXC tri-stated aTransmit Packet Timing Parameters Squelch Test Timing ParametersJabber Timing Parameters Receive Packet Timing Parameters11.4.8 10BASE-T Normal Link Pulse NLP Timing Parameters Auto-Negotiation Fast Link Pulse FLP Timing ParametersReset Timing Parameters 11.4.11 X1 Clock Specifications11.4.12 100BASE-TX Transmitter AC Specification X1 Clock SpecificationsSymbol Description Min Norm Max 12.0 82555 Package Information10.0