Intel 31244 PCI-X manual Related Documents, Design References

Page 79

Intel® 31244 PCI-X to Serial ATA Controller

References

References

16

16.1Related Documents

The following books and specifications may be helpful for designing with the Intel® 31244 PCI-X to serial ATA controller.

Table 39. Design References

Design References

1Transmission Line Design Handbook, Brian C. Wadell

2Microstrip Lines and Slotlines, K. C. Gupta. Et al.

3PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a

4PCI-X Electrical Subgroup Report, Version1.0

Design, Modeling and Simulation Methodology for High Frequency PCI-X Subsystems, Moises Cases,

5Nam Pham, Dan Neal. Refer to www.pcisig.com.

6PCI Local Bus Specification, Revision 2.2 PCI Special Interest Group 1-800-433-5177

7High-Speed Digital Design “A Handbook of Black Magic” Howard W. Johnson, Martin Graham

8Serial ATA: High-Speed Serial AT Attachment Rev. 1.0. Refer to http://www.serialata.org. “Terminating Differential Signals on PCBs”, Steve Kaufer and Kelee Crisafulli, Printed Circuit Design,

9March 1999

Intel documentation is available from your local Intel Sales Representative or Intel Literature Sales.

To obtain Intel literature write to or call:

Intel Corporation

Literature Sales

P.O. Box 5937

Denver, CO 80217-9808

(1-800-548-4725) or visit the Intel website at http://www.intel.com

Table 40.

Intel Related Documentation

 

 

 

 

 

 

 

Document Title

Order #

 

 

 

 

 

Intel® 31244

PCI-X to Serial ATA Controller Developer’s Manual

273603

 

Intel® 31244

PCI-X to Serial ATA Controller Datasheet

273595

 

Intel® Packaging Databook

240800

 

 

 

 

 

Intel® 31244

PCI-X to Serial ATA Controller HBA Manual

273792

 

Intel® 31244

PCI-X to Serial ATA Controller Red Canyon CRB Manual

273801

Design Guide

79

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Contents Design Guide Intel 31244 PCI-X to Serial ATA ControllerIntel 31244 PCI-X to Serial ATA Controller Contents Connecting Intel 31244 PCI-X to Serial ATA Controller Figures Tables Wire Lengths For Multiple PCI-X Load EmbeddedDate Revision # Description Revision HistoryThis page intentionally left blank Reference Documents About This DocumentReference Documentation Terminology and DefinitionsTerminology and Definition Sheet 2 ISI Terminology and Definition Sheet 3This page left intentionally blank Overview FeaturesFifo PCI-XQuad Serial ATA Host Bus Adapter ApplicationsThis page left intentionally blank Packaging Considerations Intel 31244 PCI-X to Serial ATA Controller PackageSerial ATA Signals Pin Descriptions Signal Pin DescriptionsName Description PCI-X Bus Pin Descriptions Sheet 1 PCI-X Bus Pin Descriptions Sheet 2 Configuration Pin DescriptionsJtag Pin Descriptions 1 VA0, VA1 Vccpll Pin Requirements Power Supply Pin DescriptionsSerial ROM Interface Pin Descriptions Package Information 256-pin Pbga Package/Marking InformationPbga Mapped By Pin Function Ball Map By FunctionThis page left intentionally blank General Routing Guidelines Routing GuidelinesCrosstalk Effects on Trace Distance and Height CrosstalkEMI Considerations Decoupling Power Distribution and DecouplingDifferential Impedance Trace ImpedanceExample 1. Two-by-two Differential Impedance Matrix Intel 31244 PCI-X to Serial ATA Controller Serial ROM Interface Intel 31244 PCI-X to Serial ATA Controller Interface PortsJtag Interface PCI-X Interface Extended Voltage Mode Direct Port Access DPAExtended Voltage Mode Normal Voltage ModeSDO LED SDI SCS# Sclk SCK LED InterfaceLED LED0 LED1 Load Capacitance 20 pF Shunt Capacitance 7 pF Reference Clock GenerationThis page left intentionally blank Printed Circuit Board PCB Methodology6 Conn Intel 31244 PCI-X to Serial ATA Controller HBA Stackup Extended Voltage ModeWrite Backplane Topology Backplane TopologiesRead Backplane Topology Variable Nominal mil Tolerance Min mil Max mil Motherboard Stackup for Backplane DesignsMotherboard Stackup, Microstrip Motherboard Microstrip ParametersMicrostrip Stackup Backplane Stripline Stackup Backplane Stripline StackupStripline Stackup Backplane Stackup, Offset Stripline Cable SpecificationCable Interconnect With Backplane Backplane Stackup, MicrostripThis page left intentionally blank PCI Voltage Levels PCI-X Layout GuidelinesPCI/X Voltage Levels PCI-X Clocking Modes PCI/X Clocking ModesGND CLK PCI General Layout GuidelinesAdd-on Card Routing Parameters Minimum MaximumProtection Circuitry for Add-in Cards PCI-X Layout Guidelines For Slot ConfigurationsPCI-X Slot Guidelines PCI Clock Layout Guidelines Segment Lower AD Bus Upper AD Bus Wiring Lengths for Single SlotLower AD Bus Upper AD Bus Embedded PCI-X Design With Multiple Loads Serial ATA Direct Connect Cables and ConnectorsSerial ATA Signal Definitions CablingCables and Connectors Serial ATA Host Connectors Serial ATA Cable Serial ATA Cable Signal ConnectionsVoltage Power Delivery This page left intentionally blank Interface Timing and SI Requirements Test MethodologyParameter Min Max Timing Requirement Serial ATA Eye DiagramExtended Voltage Mode Receiver Extended Voltage Mode Receiver ModelExtended Mode Driver Extended Voltage Mode Driver ModelTerminations Pull-up/Pull-down Sheet 1 Terminations Pull-down/Pull-upsPull-up or Pull-down Comments Terminations Pull-up/Pull-down Sheet 2 Shows the block diagram of this customer reference board Features Probing PCI-X Signals Debug Connectors and Logic Analyzer Connectivity13Logic Analyzer Pod 1 Sheet 1 Logic Analyzer Pod Logic Analyzer Pod 1 Sheet 2Irdy PCI-X Signal Name Logic Analyzer Pod This page left intentionally blank Design for Manufacturing Design for Manufacturing Thermal Resistance Thermal SolutionsLead H-PBGA Package Thermal Characteristics Thermal RecommendationsThis page left intentionally blank Design References ReferencesRelated Documents Design ReferencesElectronic Information Electronic InformationIntel 31244 PCI-X to Serial ATA Controller This page left intentionally blank