Intel 31244 PCI-X manual Applications, Quad Serial ATA Host Bus Adapter

Page 15

2.2Applications

Figure 2.

Design Guide

The GD31244 may be used to build a Serial ATA Host Bus Adapter which connects to the PCI-X bus. Control for external activity LEDs, a 37.5 MHz Crystal, a voltage regulator and some external resistors and capacitors are needed.

Quad Serial ATA Host Bus Adapter

 

 

3.3V

Regulator

2.5V

 

 

 

 

 

 

P_AD[63:0]

 

VIO

 

VCC

 

 

+

 

 

 

 

 

 

 

LED0

 

 

 

P_CBE[7:0]

 

 

 

 

22µF,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LED1

 

 

 

P_PAR

 

 

 

 

TANT,

 

 

 

P_PAR64

 

 

 

 

LED2

 

EIA-A,

 

 

 

 

 

 

 

 

6.3V

 

 

 

P_FRAME#

 

 

 

 

LED3

 

 

 

 

 

P_TRDY#

 

 

 

 

 

 

.1µF,

 

 

 

 

 

 

 

 

 

0603,

 

 

 

P_IRDY#

 

 

 

CAP0

 

 

 

 

 

 

 

 

0.1 µF

 

x7R

 

 

 

P_STOP#

 

 

 

 

 

 

 

 

 

 

 

 

CAP1

 

 

 

20

 

Bus

P_DEVSEL#

 

 

 

 

 

10 µH

 

P_REQ#

 

 

 

 

 

 

 

0603, 1%

 

 

 

 

 

 

 

 

 

-X

P_REQ64#

 

Intel®

 

VA1

 

 

 

 

 

P_ACK64#

 

 

 

 

 

 

 

PCI

 

31244

 

 

 

 

+

 

 

P_GNT#

 

 

 

 

 

 

 

 

 

PCI-X

 

 

 

 

22µF,

 

 

 

P_CLK

 

 

CAP2

 

 

 

 

 

P_IDSEL

 

to

 

 

0.015 µF

TANT,

 

 

 

 

 

 

EIA-A,

 

 

 

P_RST#

 

Serial

 

CAP3

 

 

6.3V

 

 

 

 

 

 

 

 

 

 

 

P_PERR#

 

ATA

 

 

 

 

.1µF,

2.5V

 

 

P_SERR#

 

Controller

 

 

0603,

 

 

 

P_INTA#

 

 

 

 

 

 

x7R

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC5REF

 

 

 

VA0

 

 

 

+

 

 

 

 

 

 

0.01 µF

 

 

 

 

 

 

 

 

RX0P

 

 

 

 

 

TDI

 

 

 

0.01 µF

Connector

 

22µF,

 

 

TD0

 

 

 

 

Serial

 

JTAG

 

 

 

RX0N

TANT,

 

 

 

 

 

 

TCK

 

 

 

 

0.01 µF

ATA

EIA-A,

 

 

 

 

 

6.3V

 

TMS

 

 

 

TX0P

 

Port 0

 

 

 

 

0.01 µF

.1µF,

 

 

TRST#

 

 

 

TX0N

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.01 µF

 

 

0603,

 

 

 

 

 

 

RX1P

 

 

x7R

 

 

 

 

 

 

 

 

 

 

Oscillator

 

 

 

 

Connector

 

 

 

 

 

 

 

0.01 µF

Serial

 

20

 

 

 

 

 

RX1N

10 µH

37.5 MHz

 

 

 

 

 

 

 

 

0.01 µF

ATA

 

0603, 1%

 

18 pF

 

 

 

TX1P

 

 

 

 

 

 

Port 1

 

 

 

 

CLKIN

 

0.01 µF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TX1N

 

 

 

 

 

 

 

 

 

 

 

 

+

 

 

 

 

 

 

RX2P

0.01 µF

 

 

 

 

 

CLKOUT

 

 

Connector

 

22µF,

 

 

 

 

 

0.01 µF

 

 

 

18 pF

 

 

 

RX2N

Serial

TANT,

 

 

 

 

 

 

 

 

 

 

 

 

EIA-A,

 

 

 

 

 

 

 

0.01 µF

ATA

 

 

1000 , 1%

 

 

 

6.3V

 

 

 

 

TX2P

 

Port 2

 

 

 

 

RBIAS

 

0.01 µF

.1µF,

2.5V

 

 

 

 

 

TX2N

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0603,

 

 

 

 

 

 

 

0.01 µF

 

 

 

 

 

 

 

 

RX3P

 

 

x7R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Connector

 

 

 

 

 

 

 

 

RX3N

0.01 µF

Serial

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.01 µF

ATA

 

 

 

 

 

 

 

TX3P

0.01 µF

Port 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TX3N

 

 

 

 

 

 

V18A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

V18B

 

 

 

 

 

 

 

 

+

 

 

 

 

 

 

 

 

 

 

10 µF

0.1 µF

 

 

 

 

 

 

 

 

 

 

 

+

 

 

 

 

 

 

 

 

 

 

10 µF

0.1 µF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B0418-02

 

 

 

 

 

 

 

 

 

 

15

Image 15
Contents Design Guide Intel 31244 PCI-X to Serial ATA ControllerIntel 31244 PCI-X to Serial ATA Controller Contents Connecting Intel 31244 PCI-X to Serial ATA Controller Figures Tables Wire Lengths For Multiple PCI-X Load EmbeddedDate Revision # Description Revision HistoryThis page intentionally left blank Reference Documents About This DocumentReference Documentation Terminology and DefinitionsTerminology and Definition Sheet 2 ISI Terminology and Definition Sheet 3This page left intentionally blank Overview FeaturesFifo PCI-XQuad Serial ATA Host Bus Adapter ApplicationsThis page left intentionally blank Packaging Considerations Intel 31244 PCI-X to Serial ATA Controller PackageSignal Pin Descriptions Serial ATA Signals Pin DescriptionsName Description PCI-X Bus Pin Descriptions Sheet 1 Configuration Pin Descriptions PCI-X Bus Pin Descriptions Sheet 2Jtag Pin Descriptions Power Supply Pin Descriptions 1 VA0, VA1 Vccpll Pin RequirementsSerial ROM Interface Pin Descriptions Package Information 256-pin Pbga Package/Marking InformationPbga Mapped By Pin Function Ball Map By FunctionThis page left intentionally blank General Routing Guidelines Routing GuidelinesCrosstalk Effects on Trace Distance and Height CrosstalkEMI Considerations Decoupling Power Distribution and DecouplingTrace Impedance Differential ImpedanceExample 1. Two-by-two Differential Impedance Matrix Intel 31244 PCI-X to Serial ATA Controller Intel 31244 PCI-X to Serial ATA Controller Interface Ports Serial ROM InterfaceJtag Interface PCI-X Interface Extended Voltage Mode Direct Port Access DPAExtended Voltage Mode Normal Voltage ModeLED Interface SDO LED SDI SCS# Sclk SCKLED LED0 LED1 Load Capacitance 20 pF Shunt Capacitance 7 pF Reference Clock GenerationThis page left intentionally blank Printed Circuit Board PCB Methodology6 Conn Intel 31244 PCI-X to Serial ATA Controller HBA Stackup Extended Voltage ModeWrite Backplane Topology Backplane TopologiesRead Backplane Topology Variable Nominal mil Tolerance Min mil Max mil Motherboard Stackup for Backplane DesignsMotherboard Stackup, Microstrip Motherboard Microstrip ParametersMicrostrip Stackup Backplane Stripline Stackup Backplane Stripline StackupStripline Stackup Backplane Stackup, Offset Stripline Cable SpecificationCable Interconnect With Backplane Backplane Stackup, MicrostripThis page left intentionally blank PCI-X Layout Guidelines PCI Voltage LevelsPCI/X Voltage Levels PCI/X Clocking Modes PCI-X Clocking ModesGND CLK PCI General Layout GuidelinesAdd-on Card Routing Parameters Minimum MaximumPCI-X Layout Guidelines For Slot Configurations Protection Circuitry for Add-in CardsPCI-X Slot Guidelines PCI Clock Layout Guidelines Segment Lower AD Bus Upper AD Bus Wiring Lengths for Single SlotLower AD Bus Upper AD Bus Embedded PCI-X Design With Multiple Loads Serial ATA Direct Connect Cables and ConnectorsSerial ATA Signal Definitions CablingCables and Connectors Serial ATA Host Connectors Serial ATA Cable Serial ATA Cable Signal ConnectionsVoltage Power Delivery This page left intentionally blank Test Methodology Interface Timing and SI RequirementsParameter Min Max Timing Requirement Serial ATA Eye DiagramExtended Voltage Mode Receiver Extended Voltage Mode Receiver ModelExtended Mode Driver Extended Voltage Mode Driver ModelTerminations Pull-down/Pull-ups Terminations Pull-up/Pull-down Sheet 1Pull-up or Pull-down Comments Terminations Pull-up/Pull-down Sheet 2 Shows the block diagram of this customer reference board Features Debug Connectors and Logic Analyzer Connectivity13 Probing PCI-X SignalsLogic Analyzer Pod 1 Sheet 1 Logic Analyzer Pod Logic Analyzer Pod 1 Sheet 2Irdy PCI-X Signal Name Logic Analyzer Pod This page left intentionally blank Design for Manufacturing Design for Manufacturing Thermal Resistance Thermal SolutionsLead H-PBGA Package Thermal Characteristics Thermal RecommendationsThis page left intentionally blank Design References ReferencesRelated Documents Design ReferencesElectronic Information Electronic InformationIntel 31244 PCI-X to Serial ATA Controller This page left intentionally blank