Intel manual Connecting Intel 31244 PCI-X to Serial ATA Controller

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Intel® 31244 PCI-X to Serial ATA Controller

Contents

7.3

PCI General Layout Guidelines

49

7.4

PCI-X Layout Guidelines For Slot Configurations

50

 

7.4.1

Protection Circuitry for Add-in Cards

50

 

7.4.2

PCI Clock Layout Guidelines

51

7.4.3Connecting Intel® 31244 PCI-X to Serial ATA Controller

to Single-Slot

52

7.4.4Embedded Intel® 31244 PCI-X to Serial ATA Controller

Single PCI-X Load

53

7.4.5Embedded Intel® 31244 PCI-X to Serial ATA Controller

 

Design With Multiple PCI-X Loads

54

8

Cables and Connectors

55

 

8.1 Cabling

55

 

8.1.1 Serial ATA Cable

58

9

Voltage Power Delivery

59

9.1Intel® 31244 PCI-X to Serial ATA Controller Core

 

 

Supply Voltage: Providing 2.5 V in 3.3 V System

59

10

Test Methodology

61

 

10.1

Extended Voltage Mode

63

 

 

10.1.1 Extended Voltage Mode Receiver Model

63

 

 

10.1.2 Extended Voltage Mode Driver Model

64

11

Terminations: Pull-down/Pull-ups

65

12

Intel® IQ31244 PCI-X to Serial ATA Controller Evaluation Platform Board

67

 

12.1

Features

68

13

Debug Connectors and Logic Analyzer Connectivity

69

 

13.1

Probing PCI-X Signals

69

14

Design for Manufacturing

75

15

Thermal Solutions

77

 

15.1

Thermal Recommendations

77

16

References

79

 

16.1

Related Documents

79

 

16.2

Electronic Information

80

A

Intel® IQ31244 Controller Evaluation Platform Board Bill of Materials

81

4

Design Guide

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Contents Intel 31244 PCI-X to Serial ATA Controller Design GuideIntel 31244 PCI-X to Serial ATA Controller Contents Connecting Intel 31244 PCI-X to Serial ATA Controller Figures Wire Lengths For Multiple PCI-X Load Embedded TablesRevision History Date Revision # DescriptionThis page intentionally left blank About This Document Reference DocumentationTerminology and Definitions Reference DocumentsTerminology and Definition Sheet 2 Terminology and Definition Sheet 3 ISIThis page left intentionally blank Features OverviewPCI-X FifoApplications Quad Serial ATA Host Bus AdapterThis page left intentionally blank Intel 31244 PCI-X to Serial ATA Controller Package Packaging ConsiderationsSerial ATA Signals Pin Descriptions Signal Pin DescriptionsName Description PCI-X Bus Pin Descriptions Sheet 1 PCI-X Bus Pin Descriptions Sheet 2 Configuration Pin DescriptionsJtag Pin Descriptions 1 VA0, VA1 Vccpll Pin Requirements Power Supply Pin DescriptionsSerial ROM Interface Pin Descriptions Package/Marking Information Package Information 256-pin PbgaBall Map By Function Pbga Mapped By Pin FunctionThis page left intentionally blank Routing Guidelines General Routing GuidelinesCrosstalk Crosstalk Effects on Trace Distance and HeightEMI Considerations Power Distribution and Decoupling DecouplingDifferential Impedance Trace ImpedanceExample 1. Two-by-two Differential Impedance Matrix Intel 31244 PCI-X to Serial ATA Controller Serial ROM Interface Intel 31244 PCI-X to Serial ATA Controller Interface PortsJtag Interface PCI-X Interface Direct Port Access DPA Extended Voltage ModeNormal Voltage Mode Extended Voltage ModeSDO LED SDI SCS# Sclk SCK LED InterfaceLED LED0 LED1 Reference Clock Generation Load Capacitance 20 pF Shunt Capacitance 7 pFThis page left intentionally blank Printed Circuit Board PCB Methodology6 Conn Extended Voltage Mode Intel 31244 PCI-X to Serial ATA Controller HBA StackupBackplane Topologies Write Backplane TopologyRead Backplane Topology Motherboard Stackup for Backplane Designs Motherboard Stackup, MicrostripMotherboard Microstrip Parameters Variable Nominal mil Tolerance Min mil Max milMicrostrip Stackup Backplane Stripline Stackup Backplane Stripline StackupStripline Stackup Cable Specification Cable Interconnect With BackplaneBackplane Stackup, Microstrip Backplane Stackup, Offset StriplineThis page left intentionally blank PCI Voltage Levels PCI-X Layout GuidelinesPCI/X Voltage Levels PCI-X Clocking Modes PCI/X Clocking ModesGND PCI General Layout Guidelines Add-on Card Routing ParametersMinimum Maximum CLKProtection Circuitry for Add-in Cards PCI-X Layout Guidelines For Slot ConfigurationsPCI-X Slot Guidelines PCI Clock Layout Guidelines Wiring Lengths for Single Slot Segment Lower AD Bus Upper AD BusLower AD Bus Upper AD Bus Embedded PCI-X Design With Multiple Loads Cables and Connectors Serial ATA Signal DefinitionsCabling Serial ATA Direct ConnectCables and Connectors Serial ATA Host Connectors Serial ATA Cable Signal Connections Serial ATA CableVoltage Power Delivery This page left intentionally blank Interface Timing and SI Requirements Test MethodologyParameter Min Max Serial ATA Eye Diagram Timing RequirementExtended Voltage Mode Receiver Model Extended Voltage Mode ReceiverExtended Voltage Mode Driver Model Extended Mode DriverTerminations Pull-up/Pull-down Sheet 1 Terminations Pull-down/Pull-upsPull-up or Pull-down Comments Terminations Pull-up/Pull-down Sheet 2 Shows the block diagram of this customer reference board Features Probing PCI-X Signals Debug Connectors and Logic Analyzer Connectivity13Logic Analyzer Pod 1 Sheet 1 Logic Analyzer Pod 1 Sheet 2 Logic Analyzer PodIrdy PCI-X Signal Name Logic Analyzer Pod This page left intentionally blank Design for Manufacturing Design for Manufacturing Thermal Solutions Lead H-PBGA Package Thermal CharacteristicsThermal Recommendations Thermal ResistanceThis page left intentionally blank References Related DocumentsDesign References Design ReferencesElectronic Information Electronic InformationIntel 31244 PCI-X to Serial ATA Controller This page left intentionally blank