3.3Ball Map By Function
Figure 5 shows the 544 BGA pins mapped by pin function. This diagram is helpful in placing components around the GD31244 for the layout of a PCB. To simplify routing and minimize the number of cross traces, keep this layout in mind when placing components on your board. Name signals, by design, are located on the PBGA package to simplify signal routing and system implementation.
Figure 5. PBGA Mapped By Pin Function
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A | VSS | 32BIT | LED3 | TX0N | RX0P | TX1N | RX1P | CAP0 | CAP1 | TX2N | RX2P | TX3N | RX3P | CLKIN | CLKOUT | VSS | A | ||||
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B | VCCREF | VSS | VSS | TXOP | RX0N | TX1P | RX1N | VSS | VA1 | TX2P | RX2N | TX3P | RX3N | VSS | VSS | VCCREF | B | ||||
C |
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LED2 | SCS# | VSS | VCC0 | VSS | VCC1 | VSS | VSS | VCC2 | VSS | VCC3 | VSS | VCC | VSS |
| TDO | P_AD32 | |||||
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D | VSS | P_RST# | P_INTA# | VSS | LED0 | MS_DA | SSCEN | VCC | VCC | VSS | TRST# | TCK | VSS | P_AD33 | P_ | VSS | D | ||||
PAR64 | |||||||||||||||||||||
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E | P_REQ# | P_AD31 | P_GNT# | CLKO | VIO | SDI | LED1 | TOUT | TEST0 | RBIAS | TDI | TMS | P_AD36 | P_AD35 | VI0 |
| P_AD34 | E | |||
F |
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P_AD28 | VIO | P_AD29 | P_AD30 | VIO | VSS | VSS | VSS | VSS | VSS | VSS |
| VIO | P_AD39 | P_AD38 | VSS | P_AD37 | |||||
G |
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P_AD25 | VSS | P_AD26 | P_AD27 | VIO | VSS | VSS | VSS | VSS | VSS | VSS | VIO | P_AD43 | P_AD42 | P_AD41 | P_AD40 | ||||||
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P_AD23 | P_IDSEL | P_CBE3 | P_AD24 | VIO | VSS | VSS | VSS | VSS | VSS | VSS |
| VIO | P_AD46 | P_AD45 | VIO |
| P_AD44 | ||||
J |
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P_AD19 | P_AD20 | P_AD21 | P_AD22 | VIO | VSS | VSS | VSS | VSS | VSS | VSS |
| VIO | P_AD49 | P_AD48 | VSS | P_AD47 | |||||
K |
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P_AD18 | VSS | VCC | VCC | VIO | VSS | VSS | VSS | VSS | VSS | VSS |
| VIO | VCC | VCC | P_AD51 | P_AD50 | |||||
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L | V18A | VIO | P_ | P_AD17 | VIO | VSS | VSS | VSS | VSS | VSS | VSS |
| VIO | P_AD53 | P_AD52 |
| VSS | V18B | L | ||
IRDY# |
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M | P_ | P_ | P_AD16 | P_ | VIO | VIO | VIO | VIO | VIO | VIO | VIO | VIO | P_AD54 | VSS | VIO |
| VCCREF | M | |||
TRDY# | DEVSEL# | FRAME# |
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N | P_ | VSS | P_CBE2 | VCCREF | P_AD12 | P_AD8 | VCCREF | VSS | P_AD4 | VCCREF | P_AD1 | P_AD0 | VCCREF | P_AD57 | P_AD56 | P_AD55 | N | ||||
SERR# | |||||||||||||||||||||
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P | P_ | P_ | VSS | P_AD13 | P_AD11 | P_CBE0 | VSS | P_CLK | VSS | VSS | P_ | P_CBE7 | P_CBE4 | VSS |
| P_AD59 | P_AD58 | P | |||
PERR# | STOP# | REQ64# |
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R | P_PAR | VSS | P_AD15 | VIO | P_AD10 | VIO | P_AD6 | VA0 | VSS | P_AD3 | VIO | P_CBE6 | VIO | P_AD63 |
| VSS | P_AD60 | R | |||
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T | VSS | P_CBE1 | P_AD14 | VSS | P_AD9 | P_AD7 | P_AD5 | CAP3 | CAP2 | P_AD2 | P_ | P_CBE5 | VSS | P_AD62 |
| P_AD61 | VSS | T | |||
ACK64# |
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SERDES section
VIO 3.3V
VSS
VCC is 2.5V
JTAG Section
Design Guide | 23 |