SOLA 4000 - PCB Description
1 UPS Control Logic
P1 Freq.
Offset
P5 ΦT Volts
ICT-2 Front View
P4 ΦS Volts
P3 ΦR Volts
P2 Manual Test
LD5 Overload Φ
T
LD4 Overload Φ S
LD3 Overload Φ R
LD2 Pulse Release
LD1 Synch. OK
TP5
TP4 Inom= 6V
TP3 Inom= 4V ΦT
TP2 Inom= 4V ΦS
TP1 Inom= 4V ΦR
P8 Inom ΦT
P7 Inom ΦS
P6 Inom ΦR
-Proportional to the inv. voltage. 6V ≡ nominal inverter voltage
-Inv. voltage tolerance adjust for 6V at TP1 with nom. voltage
-Push to switch ON the inverter output static switch (SSI)
FIG. 1.4 illustrates the potentiometers, LEDs and test points of the ICT-2 PCB which are accessible from the front.
-Frequency offset adjustment (when synchronisation is blocked at TP5)
-Inverter voltage adjustment phase T
-Inverter voltage adjustment phase S
-Inverter voltage adjustment phase R
-Inverter voltage adjustment during test operation (jumpers JP1, JP2, JP3 in position 2,3)
-Overload on phase T: red LED is illuminated
-Overload on phase S: red LED is illuminated
-Overload on phase R: red LED is illuminated
-Pulse release: green LED is illuminated
-Synchronisation OK: green LED is illuminated
-Synchronisation block
-Test point: test voltage = 6Vdc at full load
-Test point: test voltage = 4Vdc at full load on phase T
-Test point: test voltage = 4Vdc at full load on phase S
JUE 401268 | 98 |