CY7C63310, CY7C638xx
Table 17-7. Interrupt Mask 1 (INT_MSK1) [0xE1] [R/W]
Bit # | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Field | TCAP0 | Prog Interval | 1 ms Timer | USB Active | USB Reset | USB EP2 | USB EP1 | USB EP0 |
| Int Enable | Timer | Int Enable | Int Enable | Int Enable | Int Enable | Int Enable | Int Enable |
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| Int Enable |
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Read/Write | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Default | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
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Bit 7: TCAP0 Interrupt Enable 0 = Mask TCAP0 interrupt
1 = Unmask TCAP0 interrupt
Bit 6: Prog Interval Timer Interrupt Enable 0 = Mask Prog Interval Timer interrupt
1 = Unmask Prog Interval Timer interrupt Bit 5:
0 = Mask
1 = Unmask
Bit 4: USB Active Interrupt Enable 0 = Mask USB Active interrupt
1 = Unmask USB Active interrupt Bit 3: USB Reset Interrupt Enable 0 = Mask USB Reset interrupt
1 = Unmask USB Reset interrupt Bit 2: USB EP2 Interrupt Enable 0 = Mask EP2 interrupt
1 = Unmask EP2 interrupt
Bit 1: USB EP1 Interrupt Enable 0 = Mask EP1 interrupt
1 = Unmask EP1 interrupt
Bit 0: USB EP0 Interrupt Enable 0 = Mask EP0 interrupt
1 = Unmask EP0 interrupt
Document | Page 54 of 83 |
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