CY7C63310, CY7C638xx
Table 16-8. Programmable Interval Timer High (PITMRH) [0x27] [R]
Bit # | 7 | 6 |
| 5 | 4 | 3 | 2 | 1 | 0 |
Field |
| Reserved |
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| Prog Interval Timer [11:8] |
| ||
Read/Write | – | – |
| – | – | R | R | R | R |
Default | 0 | 0 |
| 0 | 0 | 0 | 0 | 0 | 0 |
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Bit [7:4]: Reserved
Bit [3:0]: Prog Internal Timer [11:8]
This register holds the high order nibble of the
Table 16-9. Programmable Interval Reload Low (PIRL) [0x28] [R/W]
Bit # | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Field |
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| Prog Interval [7:0] |
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| |
Read/Write | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Default | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
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Bit [7:0]: Prog Interval [7:0]
This register holds the lower 8 bits of the timer. When writing into the
Table 16-10. Programmable Interval Reload High (PIRH) [0x29] [R/W]
Bit # | 7 | 6 |
| 5 | 4 | 3 | 2 | 1 | 0 |
Field |
| Reserved |
|
|
| Prog Interval[11:8] |
| ||
Read/Write | – | – |
| – | – | R/W | R/W | R/W | R/W |
Default | 0 | 0 |
| 0 | 0 | 0 | 0 | 0 | 0 |
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Bit [7:4]: Reserved
Bit [3:0]: Prog Interval [11:8]
This register holds the higher 4 bits of the timer. While writing into the
Figure 16-2. Programmable Interval Timer Block Diagram
Sy s t e m C lo c k
C o n f ig u r a t io n
S t a t u s a n d C o n t r o l
1 2 - b it r e lo a d v a lu e
Clo c k T im e r
1 2 - b it d o w n c o u n t e r
1 2 - b it r e lo a d c o u n t e r
I n t e r r u p t
C o n t r o lle r
Document | Page 45 of 83 |
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