Xilinx ML605 manual User I/O, Fpga Init and Done LEDs, Controlled LED, Fpgainitb, Fpgadone

Page 47

Detailed Description

FPGA INIT and DONE LEDs

The typical Xilinx FPGA power up and configuration status LEDs are present on the

ML605.

The red INIT LED DS31 comes on momentarily after the FPGA powers up and during its internal power-on process. The DONE LED DS13 comes on after the FPGA programming bitstream has been downloaded and the FPGA successfully configured.

	VCC2V5			VCC2V5
					1	R419
						R419
		2				330
			Q14		2	5%
					2	1/16W
FPGA INIT B	1			FPGA_DONE		1/16W
FPGA INIT B	1			FPGA_DONE
			NDS336P
		3
				DS13	2
	DS31	1 2	RED-SMT	DS13	1	LED-GRN-SMT
		1	LED-		1
			R3		1	R4
			27.4			R4
			27.4			27.4
			1%			27.4
		2	1%		2	1%
		2	1/16W			1%
						1/16W


					UG534_17_011310

Figure 1-17:FPGA INIT and DONE LEDs

Table 1-20:FPGA INIT and DONE LED Connections

FPGA U1 Pin	Schematic Net Name	Controlled LED

P8	FPGA_INIT_B	DS31 INIT, Red

R8	FPGA_DONE	DS13 DONE, Green

17. User I/O

The ML605 provides the following user and general purpose I/O capabilities:

•User LEDs (8) with parallel wired GPIO male pin header

•User Pushbutton (5) switches with associated direction LEDs

•CPU Reset pushbutton switch

•User DIP switch (8-pole)

•User SMA GPIO

•LCD Display (16 char x 2 lines)

ML605 Hardware User Guide

www.xilinx.com

47

UG534 (v1.2.1) January 21, 2010

Image 47

Contents UG534 v1.2.1 January 21, 2010 optional ML605 Hardware User GuideDate Version Revision Revision HistoryTable of Contents ML605 Hardware User Guide About This Guide Preface About This Guide Additional Support ResourcesAdditional Information ML605 Evaluation BoardIIC Eeprom 1 KB FeaturesML605 Evaluation Board SMAFpga Init Fpga Done Overview1ML605 High-Level Block Diagram Block DiagramDDR3 Sodimm ML605 FeaturesFeature Detailed DescriptionWDW6TP ML605 Evaluation Board ML605 Features Cont’dSgmii Virtex-6 XC6VLX240T-1FFG1156 Fpga Configuration3Voltage Rails U1 Fpga Bank 2Virtex-6 Fpga Configuration Modes M20Voltage Rails Cclk Direction4DDR3 Sodimm Connections MB DDR3 Memory SodimmDetailed Description 3Voltage Rails Cont’d U1 Fpga Bank VCC1V5FPGADDR3A9 ML605 Evaluation Board 4DDR3 Sodimm Connections Cont’dDDR3D30 DQ30 DDR3DM0 See the Micron Technology, Inc. for more information Ref MB Linear BPI Flash Mb Platform Flash XLML605 Flash Boot Options FLASHD3 DQ3 FLASHD0 DQ0FLASHD1 DQ1 FLASHD2 DQ2Fpga Design Considerations for the Configuration Flash System ACE CF and CompactFlash Connector 6System ACE CF Connections U1 Fpga Pin Schematic Net Name USB Jtag Oscillator Socket Single-Ended Clock GenerationOscillator Differential 7ML605 Oscillator Socket Pin 1 Location Identifiers 8ML605 Oscillator Pin 1 Location Identifiers SMA Connectors DifferentialSmarefclkp SMA PinSmarefclkn ICS Multi-Gigabit Transceivers GTX MGTs12PCIe Lane Size Select Jumper J42 PCI Express Endpoint Connectivity8PCIe Edge Connector Connections GTXE1X0Y6 AA3 PCIERX7PAA4 PCIERX7N PCIE100MMGT0PSFP Module Connector Bit2 Bit1 Bit0 11PHY Default Interface Mode Jumper Settings J66 J67 J6812Board Connections for PHY Configuration Pins 11 /100/1000 Tri-Speed Ethernet PHYU80 M88E1111 12Board Connections for PHY Configuration Pins Cont’dSgmii GTX Transceiver Clock Generation 13Ethernet PHYConnections U1 Fpga PinRXD5 PHYRXD4RXD4 PHYRXD5Ground USB-to-UART BridgeVbus U81 USB Controller USB Controller16USB Controller Connections U38 Chrontel CH7301C DVI Codec17DVI Controller Connections IIC Bus 14IIC Bus Topology Iicsclmain SCL Kb NV Memory Iicsdamain SDA Status LEDs Designator Signal Name Color Label Description16Ethernet PHY Status LEDs Ethernet PHY Status LEDsFpgainitb User I/OFpga Init and Done LEDs Controlled LEDUser LEDs 18User LEDs and Gpio Connector, Directional LEDsGpio J62 Pin Controlled LED User Pushbutton SwitchesDetailed Description 21User LED Connections Fpga U1 Pin Switch Pin User DIP SwitchUsersmagpiop User SMA GpioUsersmagpion J41 Pin LCD Display 16 Character x 2 LinesPower On/Off Slide Switch SW2 SwitchesFpgaprogb Pushbutton SW4 Active-Low Sysaceresetb Pushbutton SW3 Active-Low26System ACE CF CompactFlash Image Select DIP Switch S1 System ACE CF CompactFlash Image Select DIP Switch S1M20 Bus Width 26ML605 Configuration ModesMaster BPI Vita 57.1 FMC HPC ConnectorHPC Pin 28VITA 57.1 FMC HPC Connections28VITA 57.1 FMC HPC Connections Cont’d FMCHPCHB08N FMCHPCHB09NFMCHPCHB08P FMCHPCHB13PDetailed Description 28VITA 57.1 FMC HPC Connections Cont’d VREFBM2C VadjVIOBM2C Vadj VREFAM2C VadjVita 57.1 FMC LPC Connector LPC Pin 30VITA 57.1 FMC LPC ConnectionsDetailed Description 30VITA 57.1 FMC LPC Connections Cont’d Power ManagementAC Adapter and Input Power Jack/Switch 28ML605 Onboard Power Regulators Onboard Power RegulationUCD7230RGWR UCD9240PFCVccintfpga Vccaux29System Monitor External Reference System MonitorSystem Monitor Header J35 12V Supply Monitor Fan Controller Bank Configuration Options Configuration OptionsML605 Evaluation Board Function/Type Default Table A-1Default Switch SettingsGmii Vita 57.1 FMC LPC J63 and HPC J64 Connector Pinout Figure B-2FMC HPC Connector Pinout ML605 Master UCF NET DDR3D9 Appendix C ML605 Master UCFNET DDR3DQS0P NET FLASHA21 ML605 Hardware User Guide UG534 v1.2.1 January 21 NET FMCHPCHB03P NET FMCHPCLA16N NET FMCLPCPRSNTM2CL NET Iicsdadvi NET PCIERX2N NET Pmbusdatals NET Sfplos NET Sfprxn NET Sfprxp NET USBD6LS References Appendix D References