Company X Accessories
C1030-5510
manual
Mechanical dimensions, USBS6 mechanical dimensions in mm
Install
Error codes
Block Diagram
Signal Name
API Error handling
Warranty
Dimension
Configuration
ResetFPGA
External expansion connectors
Page 68
Mechanical dimensions
Figure 20: USBS6 mechanical dimensions in mm
USBS6 /
C1030-5510
http://www.cesys.com/
User Doc V0.3
-68-
preliminary
Page 67
Page 69
Image 68
Page 67
Page 69
Contents
USBS6
June 29
Copyright information
Included in delivery
Feature list
Summary of USBS6
Spartan-6TMFPGA
Block Diagram
XC6SLX16-2CSG324C Fpga features
USBS6 Top View
Powering USBS6
Bus- powered USB is used as power supply input 3V@ ??? mA
Modes of operation
Mode
Name
Configuration
Jtag connector
USB2.0 FX2LPTM Microcontroller Cypresstm CY7C68013A
Signal Name
USB2.0 controller
External memory
Lpddr Sdram MT46H64M16LFCK-5
MCB1DQ0
Peripherals
SPI Flash MX25L12845EMI-10G
Fpga Pin N8 Fpga Pin M11 Fpga Pin M10 Fpga Pin N9
HEX rotary DIP switch
LEDs
Direction Comment
External expansion connectors
USB to serial Uart interface
J3 VG 96-pin external expansion connector
IDC 2x25-Pin external expansion connector J4
J4 IDC 2x25-Pin external expansion connector
ADDIO16
Cypress FX-2 LP and USB basics
Clocking Fpga designs
FX-2/FPGA slave Fifo connection
Introduction to example Fpga designs
ISE Generate Programming File Properties Gen. Opt
Fpga source code license
Disclaimer of warranty
Fpga source code copyright information
Src/wishbonepkg.vhd
Design usbs6soc
Files and modules
Src/usbs6soctop.vhd
Src/wbintercon.vhd
Src/wbmafx2.vhd
Src/wbslbram.vhd
Src/wbslmcb.vhd
Src/wbsluart.vhd
Src/xiluartmacro
Src/xilmcbmig
Signals appusbh2ppktcounto70 and appusbp2hpktcounto70
Wishbone transactions
Wishbone signals driven by the master
Wishbone signals driven by slaves
Design usbs6bram
Example
Src/usbs6bramtop.vhd
Src/simtb/wbslbramtb.vhd
Usbs6bram.xise
Usbs6bram.ucf
Wbslbramtb.cmd
Introduction
Changes to previous versions
Driver installation
Windows
Requirements
Build UDK
Lets assume to use c\\udkapi
Linux
Drivers
PCI
Makefile creation and build
Preliminary
Use APIs in own projects
Add project to UDK build
++ and .NET API
API Error handling
API Functions in detail
GetLastErrorCode
Error code Kind of error
GetLastErrorText
Methods/Functions
DeInit
Device enumeration
Init
Enumerate
DeviceType Description
GetDeviceCount
Static unsigned int ceDeviceGetDeviceCount
GetDevice
Static ceDevice *ceDeviceGetDeviceunsigned int uiIdx
Information gathering
GetUDKVersionString
GetDeviceUID
GetDeviceName
GetMaxTransferSize
GetBusType
Constant Bus
Using devices
Open
Close
Void ceDeviceOpen
ReadRegister
WriteRegister
ReadBlock
WriteBlock
WaitForInterrupt
EnableInterrupt
ResetFPGA
SetTimeOut
ProgramFPGAFromBIN
ProgramFPGAFromMemory
ProgramFPGAFromMemoryZ
EnableBurst
Void ceDeviceEnableBurstbool bEnable
UDKLab
Introduction
Main screen
UDKLab Main Screen
Using UDKLab
Device selection flow
Fpga configuration
Prepare to work with device
Fpga design flashing
Projects
Sequence contents
Add new initializing task
Content panel
Sequence start
Register entry
Register panel
Data area entry
Data area panel
Using SPI-Flash for configuration
How to store configuration data in SPI-Flash
M25P16 Fpga Connection Jtag Signal Name
IO pairing and etch length report
J3 VG-96 pin connector Differential pairs 28 IN, 12 IN/OUT
Net name
Direction
52.506
Etch Length mm B18
J4 IDC-50 pin connector Differential pairs 17 IN/OUT
Direction Fpga Bank Etch Length mm A28
Addio
42.990
Mechanical dimensions
USBS6 mechanical dimensions in mm
Table of contents Table of Contents
USB PCI
++ API
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