Apple II YES,RETURN with MANT1 Normalized, Right Shift MANT1 or Swap with MANT2 on Carry, Cmp

			*
			*
1F2C	A9	8E	FLOAT	LDA =$8E
1F2E	85	08		STA X1	SET EXPN TO 14 DEC
1F30	A9	00		LDA =0	CLEAR LOW ORDER BYTE
1F32	85	0B		STA M1+2
1F34	F0	08		BEQ NORM	NORMALIZE RESULT
1F36	C6	08	NORM1	DEC X1	DECREMENT EXP1
1F38	06	0B		ASL M1+2
1F3A	26	0A		ROL M1+1	SHIFT MANT1 (3 BYTES) LEFT
1F3C	26	09		ROL M1
1F3E	A5	09	NORM	LDA M1	HIGH ORDER MANT1 BYTE
1F40	0A			ASL	UPPER TWO BITS UNEQUAL?
1F41	45	09		EOR M1
1F43	30	04		BMI RTS1	YES,RETURN WITH MANT1 NORMALIZED
1F45	A5	08		LDA X1	EXP1 ZERO?
1F47	D0	ED		BNE NORM1	NO, CONTINUE NORMALIZING
1F49	60		RTS1	RTS	RETURN
			*
			*

*EXP/MANT2-EXP/MANT1 RESULT IN EXP/MANT1

1F4A	20	8F	1F	FSUB JSR FCOMPL	CMPL MANT1 CLEARS CARRY UNLESS ZERO
1F4D	20	5D	1F	SWPALG JSR ALGNSW	RIGHT SHIFT MANT1 OR SWAP WITH MANT2 ON CARRY
				*

*ADD EXP/MANT1 AND EXP/MANT2 RESULT IN EXP/MANT1

1F50	A5	04		FADD	LDA	X2
1F52	C5	08			CMP	X1	COMPARE EXP1 WITH EXP2
1F54	D0	F7			BNE	SWPALG	IF UNEQUAL, SWAP ADDENDS OR ALIGN MANTISSAS
1F56	20	00	1F		JSR	ADD	ADD ALIGNED MANTISSAS
1F59	50	E3		ADDEND	BVC	NORM	NO OVERFLOW, NORMALIZE RESULTS
1F5B	70	05			BVS	RTLOG	OV: SHIFT MANT1 RIGHT. NOTE CARRY IS CORRECT SIGN
1F5D	90	BD		ALGNSW	BCC	SWAP	SWAP IF CARRY CLEAR, ELSE SHIFT RIGHT ARITH.
1F5F	A5	09		RTAR	LDA	M1	SIGN OF MANT1 INTO CARRY FOR
1F61	0A				ASL		RIGHT ARITH SHIFT
1F62	E6	08		RTLOG	INC	X1	INCR EXP1 TO COMPENSATE FOR RT SHIFT
1F64	F0	7E			BEQ	OVFL	EXP1 OUT OF RANGE.
1F66	A2	FA		RTLOG1 LDX		=$FA	INDEX FOR 6 BYTE RIGHT SHIFT
1F68	A9	80		ROR1	LDA	=$80
1F6A	B0	01			BCS ROR2
1F6C	0A				ASL
1F6D	56	0F		ROR2	LSR E+3,X		SIMULATE ROR E+3,X
1F6F	15	0F			ORA E+3,X
1F71	95	0F			STA E+3,X
1F73	E8				INX		NEXT BYTE OF SHIFT
1F74	D0	F2			BNE	ROR1	LOOP UNTIL DONE
1F76	60				RTS		RETURN
				*
				*

*EXP/MANT1 X EXP/MANT2 RESULT IN EXP/MANT1

1F77	20	0D	1F	FMUL	JSR MD1	ABS. VAL OF MANT1, MANT2
1F7A	65	08			ADC X1	ADD EXP1 TO EXP2 FOR PRODUCT EXPONENT
1F7C	20	CD 1F			JSR MD2	CHECK PRODUCT EXP AND PREPARE FOR MUL
1F7F	18				CLC	CLEAR CARRY
1F80	20	66	1F	MUL1	JSR RTLOG1	MANT1 AND E RIGHT.(PRODUCT AND MPLIER)
1F83	90	03			BCC MUL2	IF CARRY CLEAR, SKIP PARTIAL PRODUCT
1F85	20	00	1F		JSR ADD	ADD MULTIPLICAN TO PRODUCT
1F88	88			MUL2	DEY	NEXT MUL ITERATION
1F89	10	F5			BPL MUL1	LOOP UNTIL DONE
1F8B	46	03		MDEND	LSR SIGN	TEST SIGN (EVEN/ODD)