Toshiba TW40F80 manual

Contents

Main TECHNICAL TRAINING MANUAL N5SS CHASSIS TW40F80 PROJECTION TELEVISION Contents Page Page 2. MERITS OF BUS SYSTEM SECTION I: OUTLINE 2-1. Improved Serviceability 2-2. Reduction of Parts Count 2-3. Quality Control 3. SPECIFICATIONS * 4. FRONT VIEW Fig. 1-1 Note: [No] Owner's manual page. 5. REAR VIEW IN-VIDEO 3 Fig. 1-3 Fig. 1-2 6. REMOTE CONTROL VIEW 23 56 89 100 TOSHIBA 4 7 7. CHASSIS LAYOUT Fig. 1-5 8. CONSTRUCTION OF CHASSIS Fig. 1-6 1. CIRCUIT BLOCK SECTION II: TUNER, IF/MTS/S. PRO MODULE 1-1. Outline 1-2. Major Features 1-3. Audio Multiplex Demodulation Circuit 1-4. A.PRO Section (Audio Processor) Fig. 2-3 A.PRO block diagram Fig. 2-4 Configuration of the audio circuit and signal flow are given in Fig. 2-4 2. POP TUNER 2-1. Outline 1. OUTLINE OF CHANNEL SELECTION CIRCUIT SYSTEM SECTION III: CHANNEL SELECTION CIRCUIT 2. OPERATION OF CHANNEL SELECTION CIRCUIT 3. MICROCOMPUTER Fig. 3-2 4. MICROCOMPUTER TERMINAL FUNCTION Page 5. EEPROM (QA02) 6. ON SCREEN FUNCTION 7. SYSTEM BLOCK DIAGRAM Fig. 3-5 8. LOCAL KEY DETECTION METHOD 9. REMOTE CONTROL CODE ASSIGNMENT Code Applicable Applicable Conti- Function to remote to TV set nuity control Page Page 10. ENTERING TO SERVICE MODE 11. TEST SIGNAL SELECTION 12. SERVICE ADJUSTMENT 13. FAILURE DIAGNOSIS PROCEDURE 13-1. Contents to be Confirmed by Customer 13-2. Contents to be Confirmed in Service Work (Check in self diagnosis mode) 13-3. Executing Self Diagnosis Function 13-4. Understanding Self Diagnosis Indication In case that phenomenon always arises. See Fig. 3-7 . Fig. 3-7 (Example of screen display) SELF CHECK Table 3-5 Page 14. TROUBLESHOOTING CHART 14-1. TV does Not Turned ON 14-2. No Acception of KEY-IN Replace QA01 14-3. No Picture (Snow Noise) 14-5. No Indication On Screen 14-4. Memory Circuit Check 1. DVD SWITCH BLOCK DIAGRAM SECTION IV: DVD SWITCH CIRCUIT Fig. 4-1 2. OUTLINE 2. CIRCUIT OPERATION SECTION V: WA C CIRCUIT 2-2. Operation Fig. 5-1 Wide aspect conversion unit block diagram (PB6348) Pin Function Fig. 5-2 Pin function of TC9097F (QFP 80 pin) Table 5-1 Names and functions of TC9097F Page I/O I No. 76 77 78 79 80 Name NC VBM QSI VBA AGND 3. BLOCK DIAGRAM Fig. 5-3 TC9097F system block diagram 4. WIDE ASPECT CONVERSION CIRCUIT FAILURE ANALYSIS PROCEDURES 4-1. Left Screen Picture Failure in Normal Mode/Double Window Modes (No Picture, Sync Distributed) 4-2. Raster Horizontal One 2. PRINCIPLES OF OPERATION SECTION VI: DUAL CIRCUIT 3. SYSTEM COMPONENT DIAGRAM OF DUAL UNIT Fig. 6-1 4. CIRCUIT OPERATION 4-1. Video/Color/Deflection Process Section OSD Fig. 6-2 circuit Signal reception To Sub screen process section superimpose 4-2. Sub Screen Process Section 4-3. Main/Sub Screen Superimposing Section 5. TERMINAL FUNCTION, DESCRIPTION AND BLOCK DIAGRAM OF MAIN IC Fig. 6-5 QY01 mm mm mPC1832GT internal block diagram VCO felter 1 Fig. 6-6 QY01 mm PC1832GT mm mPC1832GT pin layout Fig. 6-7 QY03 TC9092AF internal block diagram Fig. 6-8 QY03 TC9092AF pin layout Page Page Fig. 6-9 QY10/QY11 M518221-30ZS internal block diagram Fig. 6-10 QY10/QY11 M518221-30ZS pin layout 2-2. Circuit Description 2. CIRCUIT DESCRIPTION SECTION VII: 3-DIMENSION Y/C SEPARATOR CIRCUIT Terminal description (PZ01) Fig. 7-1 3-dimension Y/C separator unit block diagram SECTION VIII: VERTICAL OUTPUT CIRCUIT 1-1. Theory of Operation 2. V OUTPUT CIRCUIT 2-1. Actual Circuit 2-2. Sawtooth Waveform Generation 2-3. V Output Page 2-4. V Linearity Characteristic Correction 3. PROTECTION CIRCUIT FOR V DEFLECTION STOP 3-1. +35V Over Current Protection Circuit 4. RASTER POSITION SWITCHING CIRCUIT 4-1. Outline 4-2. Operation 2. HORIZONTAL DRIVE CIRCUIT SECTION IX: HORIZONTAL DEFLECTION CIRCUIT 2-1. Theory of Operation 3. BASIC OPERATION OF HORIZONTAL DRIVE 3-1. Theory of Operation 3-2. Circuit Description 4. HORIZONTAL OUTPUT CIRCUIT 4-1. Theory of Operation Page Page Page 4-2. White Peak Bending Correction Circuit 4-3. H Blanking 4-4. 200V Low Voltage Protection 5. HIGH VOLTAGE GENERATION CIRCUIT Fig. 9-15 5-1. Theory of Operation 5-2. Operation Theory of the Harmonic Non-Resonant System and Tuned Waveforms 6. HIGH VOLT AGE CIRCUIT 6-1. High Voltage Regulator Page 7. X-RAY PROTECTION CIRCUIT 7-1. Outline 7-2. Operation 8. OVER CURRENT PROTECTION CIRCUIT 8-1. Outline 8-2. Operation 1-3. Block Diagram 1. DEFLECTION DISTORTION CORRECTION IC (TA8859CP) 1-1. Outline 1-2. Functions and Features SECTION X: DEFLECTION DISTORTION CORRECTION CIRCUIT (SIDE DPC CIRCUIT) 2. DIODE MODULATOR CIRCUIT 3. ACTUAL CIRCUIT 3-1. Basic Operation and Current Path Fig. 10-10 Fig. 10-8 Fig. 10-7 Fig. 10-9 Fig. 10-14 Fig. 10-12 Fig. 10-11 Fig. 10-13 2. CIRCUIT DESCRIPTION SECTION XI: DIGITAL CONVERGENCE CIRCUIT 2-2. Circuit Description Fig. 11-1 Block diagram DATA CLK Load Save 3. PICTURE ADJUSTMENT 3-1. Outline of the Modification Process of the Storing Adjustment Data 3-2. Service Mode XX Page 3-2-4. Key function of remote control unit 23 56 89 Fig. 11-5 4 7 100 TOSHIBA 3-2-5. Operation procedure 3-3. Each Screen Adjustment Method 3-3-2. Theater Wide1 Fig. 11-7 Fig. 11-8 3-3-3. Theater Wide 2 Fig. 11-9 Fig. 11-10 3-3-4. Theater Wide 3 Fig. 11-11 Fig. 11-12 4. CASE STUDY 4-1. When CRT is Replaced. 4-2. When Convergence Unit is Replaced 5. TROUBLESHOOTING 5-1. Adjusting Procedure in Replacing CRT 5-2. Adjusting Procedure in Replacing Convergence Unit/Main Def 6. CONVERGENCE OUTPUT CIRCUIT 6-1. Outline 6-2. Circuit Description 6-3. Convergence Block Diagram Fig. 11-14 7. CONVERGENCE TROUBLESHOOTING CHART Fig. 11-6 RF SW H003 ANT1 BLANKING FRONT FRONT DEF H.V UNIT Y/C SEP. AUTO LIVE