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Toshiba TW40F80 manual Rear View, In-Video

Models: TW40F80

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5. REAR VIEW

5. REAR VIEW

TV front

Behind the door

S-VIDEO VIDEO				AUDIO
	L/MCNO				R

IN-VIDEO 3

VIDEO / AUDIO INPUT jacks (VIDEO 3)

S-VIDEO INPUT jack (VIDEO 3)

Fig. 1-2

TV rear

ANT (75 ‰)

S-VIDEO INPUT jack (VIDEO 1)

VARIABLE AUDIO

OUTPUT jacks

S-VIDEO	AMP
R	L	VAR
		ACC
Y		AMP
Y
VIDEO

(+) (+)

(—) (—)

EXT SPEAKER

EXT INT

MAIN SPEAKER

EXTERNAL SPEAKER terminal

TV

AMP

	L	C4	VIDEO
			VIDEO
L
L
VIDEO
AUDIO	VIDEO/AUDIO		AUDIO
R
	R		R

VIDEO1 VIDEO2 DVD

NCUT

	VIDEO / AUDIO	VIDEO /
	INPUT jacks
		AUDIO
	(VIDEO 1)
		OUTPUT

	VIDEO / AUDIO	jacks

MAIN SPEAKER switch

Fig. 1-3

INPUT jacks
(VIDEO 2)	DVD INPUT
	DVD INPUT
	jacks

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Image 8

Toshiba TW40F80 manual Rear View, In-Video

Contents

TECHNICAL TRAINING MANUAL N5SS CHASSIS TW40F80PROJECTION TELEVISION Contents 9. REMOTE CONTROL CODE ASSIGNMENTSECTION IV DVD SWITCH CIRCUIT SECTION II TUNER, IF/MTS/S. PRO MODULE5. TERMINAL FUNCTION, DESCRIPTION AND BLOCK DIAGRAM OF 4. WIDE ASPECT CONVERSION CIRCUIT FAILURE ANALYSIS3. SYSTEM COMPONENT DIAGRAM OF DUAL UNIT SECTION VII 3-DIMENSION Y/C SEPARATOR CIRCUITSECTION X DEFLECTION DISTORTION CORRECTION CIRCUIT 7. CONVERGENCE TROUBLESHOOTING CHART1. DEFLECTION DISTORTION CORRECTION IC TA8859CP SECTION XI DIGITAL CONVERGENCE CIRCUITSECTION 1. FEATURE OUTLINE 2. MERITS OF BUS SYSTEM2-1. Improved Serviceability 2-2. Reduction of Parts Count3. SPECIFICATIONS C-ChassisModel TW56F80 TW40F804. FRONT VIEW Note No Owners manual page5. REAR VIEW IN-VIDEO6. REMOTE CONTROL VIEW TOSHIBA7. CHASSIS LAYOUT 6 DUALBRT TBS 8. CONSTRUCTION OF CHASSISA517 SECTION II TUNER, IF/MTS/S. PRO MODULE 1. CIRCUIT BLOCK 1-2. Major FeaturesFig. 2-1 Block diagram 1-1. OutlineFig. 2-2 Block diagram of MVUS34S Switching1-3. Audio Multiplex Demodulation Circuit Table 2-1 Matrix for broadcasting conditions and reception modeFig. 2-3 A.PRO block diagram 1-4. A.PRO Section Audio ProcessorConfiguration of the audio circuit and signal flow are given in Fig MOTHERVIDEO FRONT INPUT2. POP TUNER 2-1. OutlineTerminal No Name2. OPERATION OF CHANNEL SELECTION CIRCUIT SECTION III CHANNEL SELECTION CIRCUIT1. OUTLINE OF CHANNEL SELECTION CIRCUIT SYSTEM 3. MICROCOMPUTER 4. MICROCOMPUTER TERMINAL FUNCTION MICROCOMPUTER TERMINAL NAME AND OPERATION LOGIC Terminal NameFunction In/Out5. EEPROM QA02 6. ON SCREEN FUNCTION7. SYSTEM BLOCK DIAGRAM 8. LOCAL KEY DETECTION METHOD Fig. 3-6 Local key assignment Table 3-1 Local key assignmentFunction Function9. REMOTE CONTROL CODE ASSIGNMENT CodeFunction to TV setCustom codes are 40-BFH TV set for North U.S.A CodeFunction Custom codes are 40-BFH TV set for North U.S.A9-1. Optional Setting for Each Model OPT0OPT1 MODELS12. SERVICE ADJUSTMENT 10. ENTERING TO SERVICE MODE11. TEST SIGNAL SELECTION 13. FAILURE DIAGNOSIS PROCEDURE 13-1. Contents to be Confirmed by Customer13-3-1. Procedure Contents of self diagnosisContents 13-4. Understanding Self Diagnosis IndicationExample of screen display SELF CHECKVIDEO INPUT 1 terminal should be open 13-4-2. Method utilizing inner signal13-4-1. Clearing method of self diagnosis result 14. TROUBLESHOOTING CHART 14-1. TV does Not Turned ONKey on TV Voltage change at pins 17, 18 of QA01 5V to OK Replace QA01 When remote unit key is pressed OK Replace QA01NG Check key-in circuit NG Check tuner power circuit No picture NG Voltage at pins of +5V, and OK14-4. Memory Circuit Check 14-5. No Indication On ScreenSECTION IV DVD SWITCH CIRCUIT 1. DVD SWITCH BLOCK DIAGRAM 2. OUTLINE Open at Cb input Cb to DVD SW unit Cb input RV28 100kRV27 10k QV01 TA1218NSECTION V WAC CIRCUIT 1. OUTLINE 2. CIRCUIT OPERATION2-1. Configuration 2-2-1. Signal FlowFig. 5-1 Wide aspect conversion unit block diagram PB6348 VDD5VCO2 Pin FunctionFig. 5-2 Pin function of TC9097F QFP 80 pin Function Table 5-1 Names and functions of TC9097FName Name Function3. BLOCK DIAGRAM Fig. 5-3 TC9097F system block diagramName Function4. WIDE ASPECT CONVERSION CIRCUIT FAILURE ANALYSIS PROCEDURES 4-2-1. Adjustment Method 4-2. Raster Horizontal OneSECTION VI DUAL CIRCUIT 1. OUTLINE2. PRINCIPLES OF OPERATION 9-screen multi-search process3. SYSTEM COMPONENT DIAGRAM OF DUAL UNIT 4. CIRCUIT OPERATION 4-1. Video/Color/Deflection Process SectionSignalreception 4-2. Sub Screen Process Section Fig. 6-3 Sub screen process section4-3. Main/Sub Screen Superimposing Section Fig. 6-4 Main/Sub screen superimposing sectionMAIN IC 5. TERMINAL FUNCTION, DESCRIPTION AND BLOCK DIAGRAM OFdiagram QY01Blanking pulse output Power supply videoFig. 6-6 QY01 mPC1832GT pin layout Fig. 6-7 QY03 TC9092AF internal block diagram MULTIPLEXPROGRAMDATA MEMORYFig. 6-8 QY03 TC9092AF pin layout ADVREFYPin function Table 6-1 QY03 TC9092AF pin list NoPin name Pin function Table 6-2 QY03 TC9092AF pin list NoPin name Fig. 6-9 QY10/QY11 M518221-30ZS internal block diagram Power supply +5VFig. 6-10 QY10/QY11 M518221-30ZS pin layout Terminal nameSECTION VII 3-DIMENSION Y/C SEPARATOR CIRCUIT 2. CIRCUIT DESCRIPTION2-1. Configuration 1. OUTLINEFig. 7-1 3-dimension Y/C separator unit block diagram Signal nameTerminal description PZ01 VoltageSECTION VIII VERTICAL OUTPUT CIRCUIT 1. OUTLINE 1-1. Theory of Operation2. V OUTPUT CIRCUIT 2-1. Actual Circuit2-2. Sawtooth Waveform Generation 2-2-1. Circuit Operation2-3. V Output 2-3-1. Circuit OperationFig. 8-7 Output stage power supply voltage 3. PROTECTION CIRCUIT FOR V DEFLECTION STOP 2-4. V Linearity Characteristic Correction2-4-1. S-character Correction Up-and Down-ward Extension Correction 2-4-2. Up-and Down-ward Linearity Balance3-1. +35V Over Current Protection Circuit 3-1-1. Theory of Operation4-2. Operation 4. RASTER POSITION SWITCHING CIRCUIT4-1. Outline SECTION IX HORIZONTAL DEFLECTION CIRCUIT 2. HORIZONTAL DRIVE CIRCUIT3. BASIC OPERATION OF HORIZONTAL DRIVE Fig. 9-1 H drive circuit block diagram+ ib On periodOFF period current4-1-1. Operation of Basic Circuit 4. HORIZONTAL OUTPUT CIRCUIT4-1. Theory of Operation Description of the basic circuit 1. t1~t2 2. t23. t2~t3 4. t3~t41 S-curve Correction S Capacitor Amplitude Correction4-1-2. Linearity Correction LIN 2 Left-right Asymmetrical Correction LIN coil Fig. 9-9 Linearity coil4-2. White Peak Bending Correction Circuit 4-2-1. Outline4-2-2. Operation Theory Fig. 9-11 White peak bending correction circuit4-3. H Blanking 4-3-1. Outline4-3-2. Theory of Operation 4-3-3. Circuit Operation4-4-2. Theory of Operation 4-4. 200V Low Voltage Protection4-4-1. Outline 5. HIGH VOLTAGE GENERATION CIRCUIT 5-1. Theory of Operation5-1-1. +210V 5-1-2. +35V5-1-3 5-1-4. High Voltage6. HIGH VOLTAGE CIRCUIT 6-1. High Voltage Regulator6-1-1. Outline Fig. 9-19 Basic circuit for high voltage regulator6-1-3. Actual Fig. 9-22 Actual high voltage regulator circuit7. X-RAY PROTECTION CIRCUIT 7-1. Outline7-2. Operation Fig. 9-23 X-RAY protection circuit8. OVER CURRENT PROTECTION CIRCUIT 8-1. Outline8-2. Operation Fig. 9-24 Over current protection circuitSECTION X DEFLECTION DISTORTION CORRECTION CIRCUIT SIDE DPC CIRCUIT 1. DEFLECTION DISTORTION CORRECTION IC TA8859CP1-2. Functions and Features Block Diagram2. DIODE MODULATOR CIRCUIT 3. ACTUAL CIRCUIT 3-1-2. First Half Scanning Period 3-1. Basic Operation and Current Path3-1-1. Later Half Scanning Period 3-1-3. Later Half of Flyback Period 3-1-4. First Half of Scanning PeriodSECTION XI DIGITAL CONVERGENCE CIRCUIT 2-1. Configuration1. OUTLINE 2. CIRCUIT DESCRIPTIONFig. 11-1 Block diagram ∗∗∗812bit83. PICTURE ADJUSTMENT 3-2-2. Entering/Exiting Mode 3-2. Service Mode3-2-1. Outline 2 Second screen 3-2-3. Initial screen1 First screen 3-2-4. Key function of remote control unit TOSHIBA3-3-1. Normal/Full 3-2-5. Operation procedure3-3. Each Screen Adjustment Method 3-3-2. Theater Wide1 3-3-3. Theater Wide 3-3-4. Theater Wide 4-2. When Convergence Unit is Replaced 4. CASE STUDY4-1. When CRT is Replaced 5-2. Adjusting Procedure in Replacing Convergence Unit/Main Def 5. TROUBLESHOOTING5-1. Adjusting Procedure in Replacing CRT 6. CONVERGENCE OUTPUT CIRCUIT 6-2-1. Signal flow4 To adjust from outside of digital convergence 6-1. Outline6-3. Convergence Block Diagram 7. CONVERGENCE TROUBLESHOOTING CHART VerticalWIDE F BPVOLTAGEREG DV DH