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Toshiba TW40F80 manual Troubleshooting Chart, TV does Not Turned ON

Models: TW40F80

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14. TROUBLESHOOTING CHART

14-1. TV does Not Turned ON

TV does not turned on.

YES

Relay sound

Check of voltage at pin 7 of QA01

(DC 5V).

Check power circuit.

8MHz oscillation waveform

at pin 32 of QA01.

Check OSC circuit.

Replace QA01.

Pulse output at pins 37 and 38 of QA01.

Voltage check at pin 32 of QA01

(DC 5V)

Check reset circuit.

Check relay driving circuit.

Replace QA01.

Page 31

Image 31

Toshiba TW40F80 manual Troubleshooting Chart, TV does Not Turned ON

Contents

PROJECTION TELEVISION TW40F80TECHNICAL TRAINING MANUAL N5SS CHASSIS SECTION II TUNER, IF/MTS/S. PRO MODULE Contents9. REMOTE CONTROL CODE ASSIGNMENT SECTION IV DVD SWITCH CIRCUITSECTION VII 3-DIMENSION Y/C SEPARATOR CIRCUIT 5. TERMINAL FUNCTION, DESCRIPTION AND BLOCK DIAGRAM OF4. WIDE ASPECT CONVERSION CIRCUIT FAILURE ANALYSIS 3. SYSTEM COMPONENT DIAGRAM OF DUAL UNITSECTION XI DIGITAL CONVERGENCE CIRCUIT SECTION X DEFLECTION DISTORTION CORRECTION CIRCUIT7. CONVERGENCE TROUBLESHOOTING CHART 1. DEFLECTION DISTORTION CORRECTION IC TA8859CP2-2. Reduction of Parts Count SECTION 1. FEATUREOUTLINE 2. MERITS OF BUS SYSTEM 2-1. Improved ServiceabilityTW56F80 TW40F80 3. SPECIFICATIONSC-Chassis ModelNote No Owners manual page 4. FRONT VIEWIN-VIDEO 5. REAR VIEWTOSHIBA 6. REMOTE CONTROL VIEW6 DUAL 7. CHASSIS LAYOUTA517 8. CONSTRUCTION OF CHASSISBRT TBS 1-1. Outline SECTION II TUNER, IF/MTS/S. PRO MODULE 1. CIRCUIT BLOCK1-2. Major Features Fig. 2-1 Block diagramTable 2-1 Matrix for broadcasting conditions and reception mode Fig. 2-2 Block diagram of MVUS34SSwitching 1-3. Audio Multiplex Demodulation Circuit1-4. A.PRO Section Audio Processor Fig. 2-3 A.PRO block diagramFRONT INPUT Configuration of the audio circuit and signal flow are given in FigMOTHER VIDEOName 2. POP TUNER2-1. Outline Terminal No1. OUTLINE OF CHANNEL SELECTION CIRCUIT SYSTEM SECTION III CHANNEL SELECTION CIRCUIT2. OPERATION OF CHANNEL SELECTION CIRCUIT 3. MICROCOMPUTER 4. MICROCOMPUTER TERMINAL FUNCTION In/Out MICROCOMPUTER TERMINAL NAME AND OPERATION LOGICTerminal Name Function6. ON SCREEN FUNCTION 5. EEPROM QA027. SYSTEM BLOCK DIAGRAM Function 8. LOCAL KEY DETECTION METHODFig. 3-6 Local key assignment Table 3-1 Local key assignment Functionto TV set 9. REMOTE CONTROL CODE ASSIGNMENTCode FunctionCustom codes are 40-BFH TV set for North U.S.A Custom codes are 40-BFH TV set for North U.S.ACode FunctionMODELS 9-1. Optional Setting for Each ModelOPT0 OPT111. TEST SIGNAL SELECTION 10. ENTERING TO SERVICE MODE12. SERVICE ADJUSTMENT Contents of self diagnosis 13. FAILURE DIAGNOSIS PROCEDURE13-1. Contents to be Confirmed by Customer 13-3-1. ProcedureSELF CHECK Contents13-4. Understanding Self Diagnosis Indication Example of screen display13-4-1. Clearing method of self diagnosis result 13-4-2. Method utilizing inner signalVIDEO INPUT 1 terminal should be open 14-1. TV does Not Turned ON 14. TROUBLESHOOTING CHARTNo picture NG Voltage at pins of +5V, and OK Key on TV Voltage change at pins 17, 18 of QA01 5V to OK Replace QA01When remote unit key is pressed OK Replace QA01 NG Check key-in circuit NG Check tuner power circuit14-5. No Indication On Screen 14-4. Memory Circuit CheckSECTION IV DVD SWITCH CIRCUIT 1. DVD SWITCH BLOCK DIAGRAM QV01 TA1218N 2. OUTLINEOpen at Cb input Cb to DVD SW unit Cb input RV28 100k RV27 10k2-2-1. Signal Flow SECTION V WAC CIRCUIT 1. OUTLINE2. CIRCUIT OPERATION 2-1. ConfigurationFig. 5-1 Wide aspect conversion unit block diagram PB6348 Fig. 5-2 Pin function of TC9097F QFP 80 pin Pin FunctionVDD5VCO2 Name Table 5-1 Names and functions of TC9097FFunction Function NameFunction 3. BLOCK DIAGRAMFig. 5-3 TC9097F system block diagram Name4. WIDE ASPECT CONVERSION CIRCUIT FAILURE ANALYSIS PROCEDURES 4-2. Raster Horizontal One 4-2-1. Adjustment Method9-screen multi-search process SECTION VI DUAL CIRCUIT1. OUTLINE 2. PRINCIPLES OF OPERATION3. SYSTEM COMPONENT DIAGRAM OF DUAL UNIT 4-1. Video/Color/Deflection Process Section 4. CIRCUIT OPERATIONSignalreception Fig. 6-3 Sub screen process section 4-2. Sub Screen Process SectionFig. 6-4 Main/Sub screen superimposing section 4-3. Main/Sub Screen Superimposing SectionQY01 MAIN IC5. TERMINAL FUNCTION, DESCRIPTION AND BLOCK DIAGRAM OF diagramFig. 6-6 QY01 mPC1832GT pin layout Power supply videoBlanking pulse output MEMORY Fig. 6-7 QY03 TC9092AF internal block diagramMULTIPLEX PROGRAMDATAADVREFY Fig. 6-8 QY03 TC9092AF pin layoutPin name Table 6-1 QY03 TC9092AF pin list NoPin function Pin name Table 6-2 QY03 TC9092AF pin list NoPin function Terminal name Fig. 6-9 QY10/QY11 M518221-30ZS internal block diagramPower supply +5V Fig. 6-10 QY10/QY11 M518221-30ZS pin layout1. OUTLINE SECTION VII 3-DIMENSION Y/C SEPARATOR CIRCUIT2. CIRCUIT DESCRIPTION 2-1. ConfigurationVoltage Fig. 7-1 3-dimension Y/C separator unit block diagramSignal name Terminal description PZ011-1. Theory of Operation SECTION VIII VERTICAL OUTPUT CIRCUIT 1. OUTLINE2-2-1. Circuit Operation 2. V OUTPUT CIRCUIT2-1. Actual Circuit 2-2. Sawtooth Waveform Generation2-3-1. Circuit Operation 2-3. V OutputFig. 8-7 Output stage power supply voltage 2-4-2. Up-and Down-ward Linearity Balance 3. PROTECTION CIRCUIT FOR V DEFLECTION STOP2-4. V Linearity Characteristic Correction 2-4-1. S-character Correction Up-and Down-ward Extension Correction3-1-1. Theory of Operation 3-1. +35V Over Current Protection Circuit4-1. Outline 4. RASTER POSITION SWITCHING CIRCUIT4-2. Operation Fig. 9-1 H drive circuit block diagram SECTION IX HORIZONTAL DEFLECTION CIRCUIT2. HORIZONTAL DRIVE CIRCUIT 3. BASIC OPERATION OF HORIZONTAL DRIVEcurrent + ibOn period OFF period4-1. Theory of Operation 4. HORIZONTAL OUTPUT CIRCUIT4-1-1. Operation of Basic Circuit 4. t3~t4 Description of the basic circuit 1. t1~t22. t2 3. t2~t34-1-2. Linearity Correction LIN Amplitude Correction1 S-curve Correction S Capacitor Fig. 9-9 Linearity coil 2 Left-right Asymmetrical Correction LIN coilFig. 9-11 White peak bending correction circuit 4-2. White Peak Bending Correction Circuit4-2-1. Outline 4-2-2. Operation Theory4-3-3. Circuit Operation 4-3. H Blanking4-3-1. Outline 4-3-2. Theory of Operation4-4-1. Outline 4-4. 200V Low Voltage Protection4-4-2. Theory of Operation 5-1. Theory of Operation 5. HIGH VOLTAGE GENERATION CIRCUIT5-1-4. High Voltage 5-1-1. +210V5-1-2. +35V 5-1-3Fig. 9-19 Basic circuit for high voltage regulator 6. HIGH VOLTAGE CIRCUIT6-1. High Voltage Regulator 6-1-1. OutlineFig. 9-22 Actual high voltage regulator circuit 6-1-3. ActualFig. 9-23 X-RAY protection circuit 7. X-RAY PROTECTION CIRCUIT7-1. Outline 7-2. OperationFig. 9-24 Over current protection circuit 8. OVER CURRENT PROTECTION CIRCUIT8-1. Outline 8-2. OperationBlock Diagram SECTION X DEFLECTION DISTORTION CORRECTION CIRCUIT SIDE DPC CIRCUIT1. DEFLECTION DISTORTION CORRECTION IC TA8859CP 1-2. Functions and Features2. DIODE MODULATOR CIRCUIT 3. ACTUAL CIRCUIT 3-1-1. Later Half Scanning Period 3-1. Basic Operation and Current Path3-1-2. First Half Scanning Period 3-1-4. First Half of Scanning Period 3-1-3. Later Half of Flyback Period2. CIRCUIT DESCRIPTION SECTION XI DIGITAL CONVERGENCE CIRCUIT2-1. Configuration 1. OUTLINE∗∗∗812bit8 Fig. 11-1 Block diagram3. PICTURE ADJUSTMENT 3-2-1. Outline 3-2. Service Mode3-2-2. Entering/Exiting Mode 1 First screen 3-2-3. Initial screen2 Second screen TOSHIBA 3-2-4. Key function of remote control unit3-3. Each Screen Adjustment Method 3-2-5. Operation procedure3-3-1. Normal/Full 3-3-2. Theater Wide1 3-3-3. Theater Wide 3-3-4. Theater Wide 4-1. When CRT is Replaced 4. CASE STUDY4-2. When Convergence Unit is Replaced 5-1. Adjusting Procedure in Replacing CRT 5. TROUBLESHOOTING5-2. Adjusting Procedure in Replacing Convergence Unit/Main Def 6-1. Outline 6. CONVERGENCE OUTPUT CIRCUIT6-2-1. Signal flow 4 To adjust from outside of digital convergence6-3. Convergence Block Diagram Vertical 7. CONVERGENCE TROUBLESHOOTING CHARTDV DH WIDEF BP VOLTAGEREG