A-4 681XXC OM
PIN SIGNALNAME SIGNALDESCRIPTION
1 HORIZ OUTPUT
HorizontalSweep Output: Providesa 0V at beginning and +10V at end of sweep
for all sweep modes, regardless of sweep width. In the CW mode, the voltage is
proportional to frequency between 0V at low end and +10V at the high end of
range.In CW mode, if CW Ramp is enabled, a repetitive, 0V to +10V ramp is pro-
vided. The ramp speed is adjusted by the Sweep Time function.
2 GND Chassis Ground
3 SEQ SYNC Sequential Sync Output: Providesa +5V signal during sweep retrace, at band-
switchingpoints, and during each frequency step in step sweep mode, –5V during
markers, and –10V during the selected marker.
4 LALT ENABLE L-Alternate Enable Output: Providesa TTL low-level signal which indicates that
the alternate sweep mode is active.
5 MARKER OUTPUT MarkerOutput: Providesa +5V or –5V signal during a marker. Signal polarity se-
lected from a front panel menu.
6 RETRACEBLANKING RetraceBlanking Output: Providesa +5V or –5V signal coincident with sweep re-
trace. Signal polarity selected from a front panel menu.
7 L ALTSWP L-Alternate Sweep Output: Provides a TTL low-level signal to indicate that the
primary sweep is in progress or a TTLhigh-level signal to indicate that the alter-
nate sweep is in progress.
8 Shield Cable Shield/Chassis Ground
9 TRIGGEROUTPUT TriggerOutput: Provides a TTLlow-level trigger signal for external devices or in-
struments.
10 SWPDWELL OUT Sweep Dwell Output: Provides an open-collector output which goes to ground
whenthe sweep is dwelled at the start, stop, and bandswitching frequencies, and
at the markers.
11 LOCKSTATUS Lock Status Output: Provides a TTL high-level signal when the frequency is
phase-locked.
12 RXb RXb: Serial Data Input to the processor (/t1).
13 EXTTRIGGER External Trigger: Acceptsa TTL low-level signal of 1 ms width to trigger a sweep.
Figure A-2. Pinout Diagram, AUX I/O Connector (1 of 2)
REAR PANEL CONNECTOR
CONNECTORS PINOUT DIAGRAMS
AUX I/O
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
11
12
13
25