Fujitsu MHN2300AT Read/write Circuit, Command processing during self-calibration, Write circuit

Theory of Device Operation

4.5.3 Command processing during self-calibration

If the disk drive receives a command execution request from the host while executing self-calibration according to the timechart, the disk drive terminates self-calibration and starts executing the command precedingly. In other words, if a disk read or write service is necessary, the disk drive positions the head to the track requested by the host, reads or writes data, and restarts calibration.

This enables the host to execute the command without waiting for a long time, even when the disk drive is performing self-calibration. The command execution wait time is about maximum 40 ms.

4.6 Read/write Circuit

The read/write circuit consists of the read/write preamplifier (HDIC), the write circuit, the read circuit, and the time base generator in the read channel (RDC). Figure 4.4 is a block diagram of the read/write circuit.

4.6.1 Read/write preamplifier (HDIC)

HDIC equips a read preamplifier and a write current switch, that sets the bias current to the MR device and the current in writing. Each channel is connected to each data head, and HDIC switches channel by serial I/O. HDIC generates a write unsafe signal (WUS) when a write error occurs due to head short-circuits or head disconnection, that avoids error writing.

4.6.2 Write circuit

The write data is output from the hard disk controller (HDC) with the NRZ data format, and sent to the encoder circuit in the RDC. The NRZ write data is converted from 16-bit data to 17-bit data by the encoder circuit then sent to the HDIC, and the data is written onto the media.

(1) 16/17 MTR MEEPRML

This device converts data using the 16/17 MTR (Maximum Transitions Run Length Limited) algorithm.

This code is converted so that a maximum of three 1’s are placed continuously and so that there are two or fewer 1’s in a 17-bit border.

(2) Write precompensation

Write precompensation compensates, during a write process, for write non- linearity generated at reading. Table 4.1 shows the write precompensation algorithm.

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