Terminating an Ultra DMA data out burst | Fujitsu MHN2200AT specs

5.5 Ultra DMA Feature Set

5.5.4.4Terminating an Ultra DMA data out burst

a)Host terminating an Ultra DMA data out burst

The following stops shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.3.10 and 5.6.3.2 for specific timing requirements):

1)The host shall initiate termination of an Ultra DMA burst by not generating HSTROBE edges.

2)The host shall assert STOP no sooner than tSS after it last generated an HSTROBE edge. The host shall not negate STOP again until after the Ultra DMA burst is terminated.

3)The device shall negate DMARQ within tLI after the host asserts STOP. The device shall not assert DMARQ again until after the Ultra DMA burst is terminated.

4)The device shall negate DDMARDY- with tLI after the host has negated STOP. The device shall not assert DDMARDY- again until after the Ultra DMA burst termination is complete.

5)If HSTROBE is negated, the host shall assert HSTROBE with tLI after the device has negated DMARQ. No data shall be transferred during this assertion. The device shall ignore this transition on HSTROBE. HSTROBE shall remain asserted until the Ultra DMA burst is terminated.

6)The host shall place the result of its CRC calculation on DD (15:0) (see 5.5.5)

7)The host shall negate DMACK- no sooner than tMLI after the host has asserted HSTROBE and STOP and the device has negated DMARQ and

DDMARDY-, and no sooner than tDVS after placing the result of its CRC calculation on DD (15:0).

8)The device shall latch the host's CRC data from DD (15:0) on the negating edge of DMACK-.

9)The device shall compare the CRC data received from the host with the results of its own CRC calculation. If a miscompare error occurs during one or more Ultra DMA bursts for any one command, at the end of the command, the device shall report the first error that occurred (see 5.5.5).

10)The device shall release DDMARDY- within tIORDYZ after the host has negated DMACK-.

11)The host shall neither negate STOP nor negate HSTROBE until at least tACK after negating DMACK-.

12)The host shall not assert DIOW-, CS0-, CS1-, DA2, DA1, or DA0 until at least tACK after negating DMACK.

C141-E120-02EN

5-107

Image 183

Fujitsu MHN2200AT, MHN2150AT, MHN2100AT, MHN2300AT manual Terminating an Ultra DMA data out burst

Contents

Disk Drives Product Manual MHN2300AT, MHN2200AT MHN2150AT, MHN2100AT Handling of This Manual For Safe Operation Revision History This page is intentionally left blank Overview of Manual Preface Operating Environment Conventions for Alert Messages Liability Exception This page is intentionally left blank Important Alert Messages Important Alert Items This page is intentionally left blank Disk Drives Maintenance Manual Manual OrganizationDisk Drives Product Manual This page is intentionally left blank Contents Contents Interface Operations AB-1 GL-1 Figures Illustrations Tables Contents Device Overview Features Functions and performanceAdaptability Features Device Specifications Specifications summarySpecifications 1/2 Model names and product numbers Power RequirementsSpecifications 2/2 Model and product number Current and power dissipation Environmental specifications Environmental Specifications Shock and Vibration Acoustic noise specificationShock and vibration specification Acoustic Noise MTBF= Reliability Error Rate Media Defects10Load/Unload Function Reliability This page is intentionally left blank Device Configuration Disk drive outerview Device Configuration MHN2300AT MHN2200AT MHN2150AT Configuration of disk media heads 3 2 drives connection System ConfigurationATA interface 2 1 drive connection System Configuration This page is intentionally left blank Installation Conditions Dimensions Dimensions Orientation Mounting Mounting frame structure PCA Location of breather Measurement point Temperature Service area Handling cautions Cable Connections Device connector Berg Cable connector specificationsCable connector specifications Device connection Jumper Settings Power supply connector CN1Location of setting jumpers Master drive-slave drive setting Factory default setting 14 Csel setting Csel setting 16 Example 2 of Cable Select Theory of Device Operation Head OutlineSubassemblies Disk Spindle ActuatorAir filter Circuit Configuration MCU Power Supply Configuration Circuit Configuration Power-on Sequence Self-calibration Self-calibration contents Self-calibration Execution timing of self-calibration Write circuit Command processing during self-calibrationRead/write Circuit Read/write preamplifier Hdic Write precompensation algorithm Read/write circuit block diagram Read circuit Frequency characteristic of programmable filter Meeprm Digital PLL circuit Servo control circuit Servo Control Theory of Device Operation Servo Control Data-surface servo format Physical sector servo configuration on disk surface Servo frame format Servo frame format Actuator motor control Spindle motor control Servo Control This page is intentionally left blank Interface Physical Interface Interface signals Signal assignment on the interface connector Signal assignment on the connector Dior MstrDiow Stop Dasp KEYPdiag Cblid Logical Interface 1 I/O registers I/O registersDA2 DA1 DA0 Command block registers Icrc UNC IdnfAmnf Logical Interface DEV HS3 HS2 HS1 HS0 DSC DRQ ERR BSY Interface Host Commands Control block registersSrst Command code and parameters 1 Command code and parameters Command code and parameters 2 Command descriptions Host Commands Read Multiple X’C4’ MSB Execution example of Read Multiple command 00*1 Host Commands Start head No. / LBA MSB 1F7 HCM 1F6 HDH Write Multiple X’C5’ Host Commands Write Verify X’3C’ Host Commands Interface Initialize Device Parameters X’91’ Identify Device X’EC’ Identify Device DMA X’EE’ Information to be read by Identify Device command 1 Information to be read by Identify Device command 2 Information to be read by Identify Device command 3 Multiple Bit 1 1 = Mode Host Commands Interface Host Commands SET Features X’EF’ ’CC’ Features register values and settable modes’AA’ ’BB’ Interface Host Commands SET Multiple Mode X’C6’ SET MAX Freeze Lock SET MAX SET PasswordSET MAX Lock SET MAX Unlock SET MAX Address Host Commands Password information Host Commands Interface Read Native MAX Address F8 Execute Device Diagnostic X’90’ Diagnostic code Interface Host Commands 1F7 HCM Write Buffer X’E8’ Interface Host Commands Interface Host Commands Interface ’FF’ Interface Features Register values subcommands and functions 1 Features Register values subcommands and functions 2 ’DB’ Features Register values subcommands and functions 3 Interface Format of device attribute value data 1FFFormat of insurance failure threshold value data Interface Host Commands Interface 10 Log Directory Data Format 11 Smart error log data format Host Commands 1FC 12 Smart self test log data format 13 Contents of security password Interface Host Commands Read DMA Write DMA 14 Contents of Security SET Password data Security Unlock Flush Cache E7 Device Configuration Identify Device Configuration B1Device Configuration Restore Device Configuration Freeze Host Commands Interface 16 Device Configuration Identify data structure 17 Command code and parameters 1 Error posting 17 Command code and parameters 2 Command Protocol PIO Data transferring commands from device to hostExecute Device Diagnostic Initialize Device Parameters Read Sectors command protocol Protocol for command abort PIO Data transferring commands from host to device Command Protocol Recablibrate Commands without data transfer Protocol for the command execution without data transfer Other commands DMA data transfer commandsRead Multiple Sleep Write Multiple Shows the correct DMA data transfer protocol C141-E120-02EN Normal DMA data transfer Overview Ultra DMA Feature Set Phases of operation Ultra DMA data in commandsInitiating an Ultra DMA data in burst Data in transfer Pausing an Ultra DMA data in burst Terminating an Ultra DMA data in burst Ultra DMA Feature Set Interface Ultra DMA data out commands Initiating an Ultra DMA data out burstData out transfer Pausing an Ultra DMA data out burst Terminating an Ultra DMA data out burst Interface Ultra DMA CRC rules DIOW-STOP Series termination required for Ultra DMA17 Recommended series termination for Ultra DMA DIOR-HDMARDY-HSTROBE Timing PIO data transferPIO data transfer timing Multiword data transfer 10 Multiword DMA data transfer timing mode 11 Initiating an Ultra DMA data in burst Ultra DMA data transfer Strobe Name Mode Comment MIN MAX 18 Ultra DMA data burst timing requirements 2 19 Ultra DMA sender and recipient timing requirements Mode Name Comment 12 Sustained Ultra DMA data in burst Sustained Ultra DMA data in burst 13 Host pausing an Ultra DMA data in burst Host pausing an Ultra DMA data in burst 14 Device terminating an Ultra DMA data in burst Device terminating an Ultra DMA data in burst 15 Host terminating an Ultra DMA data in burst Host terminating an Ultra DMA data in burst 16 Initiating an Ultra DMA data out burst 17 Sustained Ultra DMA data out burst Sustained Ultra DMA data out burst 18 Device pausing an Ultra DMA data out burst Device pausing an Ultra DMA data out burst 19 Host terminating an Ultra DMA data out burst Host terminating an Ultra DMA data out burst 20 Device terminating an Ultra DMA data out burst 21 Power-on Reset Timing Power-on and reset Operations Response to power-on Device Response to the Reset Response to power-on Response to hardware reset Response to hardware reset Response to software reset Response to software reset Response to diagnostic command Response to diagnostic command Power save mode Power Save Power commands Defect Management Spare areaAlternating defective sectors Sector slip processing Alternate cylinder assignment Read-Ahead Cache Data buffer configuration Caching operationRead Sector S Read Multiple Read DMA − Write Sectors − Write DMA − Write Multiple Mis-hit no hit Usage of read segment Sequential read Requested data Mis-hit data Empty area Read-ahead data New read-ahead data Hit data Full hit hit all HAPDAP Partially hit Write Cache Write Sectors Write Multiple Write DMA Write Cache This page is intentionally left blank Glossary Positioning Power save modeRotational delay PIO Programmed input-output VCM Status This page is intentionally left blank Acronyms and Abbreviations This page is intentionally left blank Japan Comment FormMHN2300AT, MHN2200AT, MHN2150AT, MHN2100AT Disk Drives Product Manual This page is intentionally left blank C141-E120-02EN MHN2300AT, MHN2200AT, MHN2150AT, MHN2100AT This page is intentionally left blank