GEH-6385 Reference and Troubleshooting, 2300 V Drives Chapter 3 Paramters/Functions
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Function description
The product completely handles con figuration of the Frame Phaselock Loop
function. Appropri ate user selections of Network interface activate the function, and
user specification of LAN frame time sets the nominal period.
The Boolean variable Frame PLL OK status indicates th e status of the Frame
Phaselock Loop. The asserted state indicates th at the function has been activat ed and
that lock status has been va lidated. The unasserted stat e indicates that the function i s
not activated or that lock status is not validated.
The FPLL Phase error signal reflects the phase err or when valid phase information
has been extracted fr om the interface. A signal value of zer o indicates either zero
phase error or invalid phase information. Scaling i s such that one per-unit phase error
represents a full commun ication frame period.
The FPLL Freq Output si gnal is the frequency adjustmen t output of the function; the
authority of the function to modify away from nominal frequency is strictly limited.
When the function is not a ctivated, the FPLL Freq Output signal is zero. When the
function is activated but no valid phase information is detected, then FPLL Freq
Output maintains its last valid calculated value.
When phaselock is achieved, Frame PLL OK status is asserted, FPLL Phase error is
at a zero-mean steady-sta te value, and FPLL Freq Output is at a non-zero, but very
small, steady-state value. When the Frame Phaselock Loop has been requested by
configuration but ph aselock is not achieved, then Frame PLL not OK is shown.
LAN Configurati on and Health
The following information describes the configuration of the primary signal interface
between the Innovati on Series device and the applica tion layer interface. The
application layer may consist of an embedded ACL card, a direct LAN interface
card, or an application-level ISBus serial bus.