Ice | Intel 8051 specification

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Intel 8051 manual Ice

Contents

Architectural Specification ICE Architectural Specification and Functional Description SINGLE-COMPONENT 8-BIT Microcomputer Contents Architectural Overview Enhancing the 8048 ARCHITEC- Ture for the 80s AbstractIntelscomplete Line of SINGLE-CHIP Microcomputers MACRO-VIEW of the 8051 Archi Tecture Architectural Speciffcation ancrFunctionaJ Descrlpfion On-Chip Peripheral Functions Request Microcomputer Expansion Components Ii~O,.R~~~~~~ ~ J -r-r ~r~ r =fJ Architectural Specification and Functional Description ~~~--------~--~--~---I~ Internal Data Memory Instruction DecoderProgram Counter · t1 Oscillator and Timing Circuitry Arithmetic SectionProgramControl Section Boolean Processor Operand Addressing Parallel I/O Ports ~~143 136 ~ Data Manipulation Data Transfer Operations Logic Operations 18. External Data Memory Move Operations Arithmetic Operations 21. Internal Data Memory Logic Operations REGplSCTER 14e--I-~--I~IMMEDArE,.j Instruction SeT What the Instruction Set Is Organization of the Instruction Set Data Transfer Control Transfer Operand Addressing Modes & Associated Operations 33.A Operand Addressing Modes Interrupt System MOV TFI TCON.7 Ports and I/O Pins External Interrupts Accessing External Memory Accessing External Memory-Bus Cycle Timing TsU~l ArcnneCtural specification and Functional DescriptionAccessing External Memory-Opera- tion of Ports CDV Configuring the Timer/Counter Input TIMER/COUNTERTimer/Counter Mode Selection Serial Channel 47. Uart Interfacing Technique Operating Modes SCON.O Transmission Rate Generation Uart Error ConditionsSerial Frame Processor Reset and Initialization Power Down Standby Operation of Internal RAM Eprom Programming Vee RSTNpD Instructions That Affect Flag Settings 8051 Instruction SET Summary All mnemonics copyrighted@ Intel Corporation